Mixed Materials
Applying formal verification techniques to verify a Fetch Unit
| Τίτλος: | Applying formal verification techniques to verify a Fetch Unit |
|---|---|
| Συγγραφείς: | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Moreno Vega, Alberto, Espasa Sans, Roger, Jiménez González, Adrián |
| Στοιχεία εκδότη: | Universitat Politècnica de Catalunya 2024-07-01 |
| Τύπος εγγράφου: | Mixed materials |
| Περίληψη: | The fetch unit of a GPP is a difficult block to verify. The complexity of the problem stems from the size of the state (cache, pipeline, etc.). Formal verification techniques, traditionally, have difficulty handling problems with large amounts of memory. We will explore different approaches to deal with these limitations such that we are able to reduce the wall time needed by the Formal Verification tools. This project covers the design and implementation of a Testbench for Formal Verification. In addition, it introduces different techniques and configurations to reduce the complexity of the Design Under Test and how they are applied into our Formal Verification Testbench. Finally, the performance impact of each technique is analyzed at the end of the document. |
| Όροι ευρετηρίου: | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors, Computer programs--Testing, Verificació Formal, Assercions, Proves, Complexitat, Tècniques de reducció, Formal Verification, Assertions, Proofs, Complexity, Reduction Techniques, Programes d'ordinador--Verificació, Master thesis |
| Σύνδεσμος: | |
| Διαθεσιμότητα: | Open access content. Open access content Open Access |
| Σημείωση: | application/pdf English |
| Other Numbers: | HGF oai:upcommons.upc.edu:2117/418186 188837 1479294802 |
| Πηγή συνεισφοράς: | UNIV POLITECNICA DE CATALUNYA From OAIster®, provided by the OCLC Cooperative. |
| Αριθμός Καταχώρησης: | edsoai.on1479294802 |
| Βάση Δεδομένων: | OAIster |
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