APA (7th ed.) Citation

Hasan, M. M., Ahmed, R., Ferdose, N., & Amin, M. T. (2026). A Low-Power 4-Bit Full Adder Design Using Transmission Gate Logic with LECTOR-Based Leakage Reduction. 2026 IEEE 2nd International Conference on Quantum Photonics, Artificial Intelligence & Networking (QPAIN), Quantum Photonics, Artificial Intelligence & Networking (QPAIN), 2026 IEEE 2nd International Conference on, 1. https://doi.org/10.1109/QPAIN69676.2026.11545659

Chicago Style (17th ed.) Citation

Hasan, M Mehedi, Raisa Ahmed, Nowshin Ferdose, and Md Tawfiq Amin. "A Low-Power 4-Bit Full Adder Design Using Transmission Gate Logic with LECTOR-Based Leakage Reduction." 2026 IEEE 2nd International Conference on Quantum Photonics, Artificial Intelligence & Networking (QPAIN), Quantum Photonics, Artificial Intelligence & Networking (QPAIN), 2026 IEEE 2nd International Conference on 2026: 1. https://doi.org/10.1109/QPAIN69676.2026.11545659.

MLA (9th ed.) Citation

Hasan, M Mehedi, et al. "A Low-Power 4-Bit Full Adder Design Using Transmission Gate Logic with LECTOR-Based Leakage Reduction." 2026 IEEE 2nd International Conference on Quantum Photonics, Artificial Intelligence & Networking (QPAIN), Quantum Photonics, Artificial Intelligence & Networking (QPAIN), 2026 IEEE 2nd International Conference on, 2026, p. 1, https://doi.org/10.1109/QPAIN69676.2026.11545659.