Conference

A Low-Power 4-Bit Full Adder Design Using Transmission Gate Logic with LECTOR-Based Leakage Reduction

Bibliographic Details
Title: A Low-Power 4-Bit Full Adder Design Using Transmission Gate Logic with LECTOR-Based Leakage Reduction
Authors: Hasan, M Mehedi, Ahmed, Raisa, Ferdose, Nowshin, Amin, Md Tawfiq
Source: 2026 IEEE 2nd International Conference on Quantum Photonics, Artificial Intelligence & Networking (QPAIN) Quantum Photonics, Artificial Intelligence & Networking (QPAIN), 2026 IEEE 2nd International Conference on. :1-6 Apr, 2026
Relation: 2026 IEEE 2nd International Conference on Quantum Photonics, Artificial Intelligence & Networking (QPAIN)
Database: IEEE Xplore Digital Library
Description
ISBN:9798331549909
9798331549916
DOI:10.1109/QPAIN69676.2026.11545659