Academic Journal
Ultra-Low-Power Dynamic-Bias Comparators With Self-Clocked Latch in 65-nm CMOS
| Τίτλος: | Ultra-Low-Power Dynamic-Bias Comparators With Self-Clocked Latch in 65-nm CMOS |
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| Συγγραφείς: | Rajendra, A.K., Singh Bindra, H., Nauta, B. |
| Πηγή: | IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 61(6):2821-2833 Jun, 2026 |
| Βάση Δεδομένων: | IEEE Xplore Digital Library |
| ISSN: | 00189200 1558173X |
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| DOI: | 10.1109/JSSC.2025.3612157 |