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Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and Efficiency

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Τίτλος: Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and Efficiency
Συγγραφείς: Chuang, P., Lorenzelli, F., Wu, C., Jan Marinissen, E.
Πηγή: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 44(3):1155-1168 Mar, 2025
Βάση Δεδομένων: IEEE Xplore Digital Library
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PubType: Academic Journal
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  Data: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 44(3):1155-1168 Mar, 2025
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      – Type: doi
        Value: 10.1109/TCAD.2024.3466809
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        PageCount: 14
        StartPage: 1155
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      – TitleFull: Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and Efficiency
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            NameFull: Chuang, P.
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              Type: published
              Y: 2025
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