Academic Journal
Breaking In-Order Branch Miss Recovery
| Title: | Breaking In-Order Branch Miss Recovery |
|---|---|
| Authors: | Stijn Eyerman, Wim Heirman, Sam Van den Steen, Ibrahim Hur |
| Source: | IEEE Computer Architecture Letters. 19:30-33 |
| Publisher Information: | Institute of Electrical and Electronics Engineers (IEEE), 2020. |
| Publication Year: | 2020 |
| Subject Terms: | 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 01 natural sciences |
| Description: | Despite very accurate branch predictors, branch misses remain an important source of performance limiters, especially for irregular applications. To ensure in-order commit, branch miss recovery is done in-order: all instructions after the oldest branch miss are flushed, even if they eventually reconverge with the correct path. We propose a technique to limit flushing to real wrong-path instructions only, allowing the resolution of newer branch misses while an older one is not yet resolved. Our technique involves minimal additions to a conventional out-of-order processor, by reusing existing checkpoint mechanisms and relying on programmer/compiler inserted hints to detect data and control independence. We evaluate the technique on graph benchmarks, resulting in up to 2× increase in performance. |
| Document Type: | Article |
| ISSN: | 2473-2575 1556-6056 |
| DOI: | 10.1109/lca.2020.2980277 |
| Rights: | IEEE Copyright |
| Accession Number: | edsair.doi.dedup.....0b2d413f6b9db0c00414c04b4f19388c |
| Database: | OpenAIRE |
| ISSN: | 24732575 15566056 |
|---|---|
| DOI: | 10.1109/lca.2020.2980277 |