Academic Journal
Joint security and performance improvement in multilevel shared caches.
| Τίτλος: | Joint security and performance improvement in multilevel shared caches. |
|---|---|
| Συγγραφείς: | Sarihi, Amin, Patooghy, Ahmad, Amininasab, Mahdi, Shokrolah Shirazi, Mohammad, A. Badawy, Abdel‐Hameed |
| Πηγή: | IET Information Security (Wiley-Blackwell); Jul2021, Vol. 15 Issue 4, p297-308, 12p |
| Θεματικοί όροι: | Cache memory, Computer storage devices, Object-oriented programming languages, Processing (Computer program language), Computer network security |
| Περίληψη: | Multilevel cache architectures are widely used in modern heterogeneous systems for performance improvement. However, satisfying the performance and security requirements at the same time is a challenge for such systems. A simple and efficient timing attack on the shared portions of multilevel hierarchical caches and its corresponding countermeasure is proposed here. The proposed attack prolongs the execution time of the victim threads by inducing intentional race conditions in shared memory spaces. Then, a thread‐mapping algorithm to detect such race conditions between a group of threads and resolve them as a countermeasure against the attack is proposed. The proposed countermeasure dynamically monitors races on cache blocks and distributes existing and new threads on processing cores to minimize cache contention. Upon detection of a high contention rate that might be either due to an attack or a natural race condition, two mechanisms, namely cache access‐rate reduction and thread migration, will be used by the countermeasure algorithm to resolve the race situation. Evaluations on SPECCPU 2006 benchmark suite show that the proposed algorithm not only protects the system against the introduced attack but also boosts the overall system performance by an average of 46.35% and 55.92% for the worst and average cases, respectively. [ABSTRACT FROM AUTHOR] |
| Copyright of IET Information Security (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Βάση Δεδομένων: | Complementary Index |
| FullText | Links: – Type: other Text: Availability: 0 |
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| Header | DbId: edb DbLabel: Complementary Index An: 150206708 RelevancyScore: 900 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 899.895385742188 |
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| Items | – Name: Title Label: Title Group: Ti Data: Joint security and performance improvement in multilevel shared caches. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Sarihi%2C+Amin%22">Sarihi, Amin</searchLink><br /><searchLink fieldCode="AR" term="%22Patooghy%2C+Ahmad%22">Patooghy, Ahmad</searchLink><br /><searchLink fieldCode="AR" term="%22Amininasab%2C+Mahdi%22">Amininasab, Mahdi</searchLink><br /><searchLink fieldCode="AR" term="%22Shokrolah+Shirazi%2C+Mohammad%22">Shokrolah Shirazi, Mohammad</searchLink><br /><searchLink fieldCode="AR" term="%22A%2E+Badawy%2C+Abdel‐Hameed%22">A. Badawy, Abdel‐Hameed</searchLink> – Name: TitleSource Label: Source Group: Src Data: IET Information Security (Wiley-Blackwell); Jul2021, Vol. 15 Issue 4, p297-308, 12p – Name: Subject Label: Subject Terms Group: Su Data: <searchLink fieldCode="DE" term="%22Cache+memory%22">Cache memory</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+storage+devices%22">Computer storage devices</searchLink><br /><searchLink fieldCode="DE" term="%22Object-oriented+programming+languages%22">Object-oriented programming languages</searchLink><br /><searchLink fieldCode="DE" term="%22Processing+%28Computer+program+language%29%22">Processing (Computer program language)</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+network+security%22">Computer network security</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Multilevel cache architectures are widely used in modern heterogeneous systems for performance improvement. However, satisfying the performance and security requirements at the same time is a challenge for such systems. A simple and efficient timing attack on the shared portions of multilevel hierarchical caches and its corresponding countermeasure is proposed here. The proposed attack prolongs the execution time of the victim threads by inducing intentional race conditions in shared memory spaces. Then, a thread‐mapping algorithm to detect such race conditions between a group of threads and resolve them as a countermeasure against the attack is proposed. The proposed countermeasure dynamically monitors races on cache blocks and distributes existing and new threads on processing cores to minimize cache contention. Upon detection of a high contention rate that might be either due to an attack or a natural race condition, two mechanisms, namely cache access‐rate reduction and thread migration, will be used by the countermeasure algorithm to resolve the race situation. Evaluations on SPECCPU 2006 benchmark suite show that the proposed algorithm not only protects the system against the introduced attack but also boosts the overall system performance by an average of 46.35% and 55.92% for the worst and average cases, respectively. [ABSTRACT FROM AUTHOR] – Name: Abstract Label: Group: Ab Data: <i>Copyright of IET Information Security (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edb&AN=150206708 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1049/ise2.12023 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 12 StartPage: 297 Subjects: – SubjectFull: Cache memory Type: general – SubjectFull: Computer storage devices Type: general – SubjectFull: Object-oriented programming languages Type: general – SubjectFull: Processing (Computer program language) Type: general – SubjectFull: Computer network security Type: general Titles: – TitleFull: Joint security and performance improvement in multilevel shared caches. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Sarihi, Amin – PersonEntity: Name: NameFull: Patooghy, Ahmad – PersonEntity: Name: NameFull: Amininasab, Mahdi – PersonEntity: Name: NameFull: Shokrolah Shirazi, Mohammad – PersonEntity: Name: NameFull: A. Badawy, Abdel‐Hameed IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 07 Text: Jul2021 Type: published Y: 2021 Identifiers: – Type: issn-print Value: 17518709 Numbering: – Type: volume Value: 15 – Type: issue Value: 4 Titles: – TitleFull: IET Information Security (Wiley-Blackwell) Type: main |
| ResultId | 1 |