rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Constraining designs for syntheis and timing analysis
    sub title: a practical guide to synopsys design constraints (SDC)
  name:
    name part: Gangadharan, Sridhar.
    role:
      role term: creator
  name:
    name part: Churiwala, Sanjay
    role:
      role term: aut
  name:
    name part: Revenu, Frederic
    role:
      role term: oth
  type of resource: text
  origin info:
    place:
      place term: nyu
    place:
      place term: New York
    publisher: Springer
    date issued: c2013
    date issued: 2013
    copyright date: ####
    issuance: monographic
  language:
    language term: eng
  physical description:
    extent: xxvii, 226 σ. : σχέδια ; 25 εκ.
  note: Sridhar Gangadharan, Sanjay Churiwala ; with Chapter 17 contributed by Frederic Revenu.
  note: Βιβλιογραφία: σ. 219. Ευρετήριο.
  subject:
    topic: Timing circuits
  subject:
    topic: Integrated circuits
    topic: Design and construction
  subject:
    topic: Real-time clocks (Computers)
  subject:
    topic: Constraint programming (Computer science)
  subject:
    topic: Systems on a chip
    topic: Design
  classification: 621.3815
  identifier: 9781461432685
  location:
    physical location: INST SAMOS 20160923
  record info:
    record content source: GR-MyUa
    record creation date: 160923
    record identifier: 1/112058
    language of cataloging:
      language term: gre