APA (7th ed.) Citation

Nishikawa, N., Iwai, K., Kurokawa, T., Hutchison, D., Kanade, T., Kittler, J., . . . Zomaya, A. (2012). Power Efficiency Evaluation of Block Ciphers on GPU-Integrated Multicore Processor. Algorithms and Architectures for Parallel Processing : 12th International Conference, ICA3PP 2012, Fukuoka, Japan, September 4-7, 2012, Proceedings, Part I, 7439, 347. https://doi.org/10.1007/978-3-642-33078-0_25

Chicago Style (17th ed.) Citation

Nishikawa, Naoki, et al. "Power Efficiency Evaluation of Block Ciphers on GPU-Integrated Multicore Processor." Algorithms and Architectures for Parallel Processing : 12th International Conference, ICA3PP 2012, Fukuoka, Japan, September 4-7, 2012, Proceedings, Part I 7439 (2012): 347. https://doi.org/10.1007/978-3-642-33078-0_25.

MLA (9th ed.) Citation

Nishikawa, Naoki, et al. "Power Efficiency Evaluation of Block Ciphers on GPU-Integrated Multicore Processor." Algorithms and Architectures for Parallel Processing : 12th International Conference, ICA3PP 2012, Fukuoka, Japan, September 4-7, 2012, Proceedings, Part I, vol. 7439, 2012, p. 347, https://doi.org/10.1007/978-3-642-33078-0_25.