Conference
Προβολή σε EDS

Performance Improvement of Parallel Programming Model Based on Parameterized Pipelined Map Reduce Approach

Λεπτομέρειες βιβλιογραφικής εγγραφής
Τίτλος: Performance Improvement of Parallel Programming Model Based on Parameterized Pipelined Map Reduce Approach
Συγγραφείς: Balasaheb, Dhole Poonam, Vikram Kishor, Abhang, Sudhir, Thorat Abhinav
Πηγή: 2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT) Electrical, Computer and Communication Technologies (ICECCT), 2019 IEEE International Conference on. :1-5 Feb, 2019
Relation: 2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT)
Βάση Δεδομένων: IEEE Xplore Digital Library
FullText Text:
  Availability: 0
Header DbId: edseee
DbLabel: IEEE Xplore Digital Library
An: edseee.8869321
RelevancyScore: 1003
AccessLevel: 2
PubType: Conference
PubTypeId: conference
PreciseRelevancyScore: 1003.22875976563
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Performance Improvement of Parallel Programming Model Based on Parameterized Pipelined Map Reduce Approach
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Balasaheb%2C+Dhole+Poonam%22">Balasaheb, Dhole Poonam</searchLink><br /><searchLink fieldCode="AR" term="%22Vikram+Kishor%2C+Abhang%22">Vikram Kishor, Abhang</searchLink><br /><searchLink fieldCode="AR" term="%22Sudhir%2C+Thorat+Abhinav%22">Sudhir, Thorat Abhinav</searchLink>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: 2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT) Electrical, Computer and Communication Technologies (ICECCT), 2019 IEEE International Conference on. :1-5 Feb, 2019
– Name: NoteTitleSource
  Label: Relation
  Group: SrcInfo
  Data: 2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT)
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.8869321
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1109/ICECCT.2019.8869321
    PhysicalDescription:
      Pagination:
        PageCount: 5
        StartPage: 1
    Titles:
      – TitleFull: Performance Improvement of Parallel Programming Model Based on Parameterized Pipelined Map Reduce Approach
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Balasaheb, Dhole Poonam
      – PersonEntity:
          Name:
            NameFull: Vikram Kishor, Abhang
      – PersonEntity:
          Name:
            NameFull: Sudhir, Thorat Abhinav
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 02
              Type: published
              Y: 2019
          Identifiers:
            – Type: isbn-print
              Value: 9781538681589
            – Type: issn-locals
              Value: edseee.IEEEConferenc
          Titles:
            – TitleFull: 2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT), Electrical, Computer and Communication Technologies (ICECCT), 2019 IEEE International Conference on
              Type: main
ResultId 1