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McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations

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Τίτλος: McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations
Συγγραφείς: Tang, A., Yang, Y., Lee, C., Jha, N.K.
Πηγή: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 23(9):1616-1627 Sep, 2015
Βάση Δεδομένων: IEEE Xplore Digital Library
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Header DbId: edseee
DbLabel: IEEE Xplore Digital Library
An: edseee.6898862
RelevancyScore: 905
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 904.655456542969
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Tang%2C+A%2E%22">Tang, A.</searchLink><br /><searchLink fieldCode="AR" term="%22Yang%2C+Y%2E%22">Yang, Y.</searchLink><br /><searchLink fieldCode="AR" term="%22Lee%2C+C%2E%22">Lee, C.</searchLink><br /><searchLink fieldCode="AR" term="%22Jha%2C+N%2EK%2E%22">Jha, N.K.</searchLink>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 23(9):1616-1627 Sep, 2015
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.6898862
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1109/TVLSI.2014.2352354
    PhysicalDescription:
      Pagination:
        PageCount: 1
        StartPage: 1616
    Titles:
      – TitleFull: McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Tang, A.
      – PersonEntity:
          Name:
            NameFull: Yang, Y.
      – PersonEntity:
          Name:
            NameFull: Lee, C.
      – PersonEntity:
          Name:
            NameFull: Jha, N.K.
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 09
              Type: published
              Y: 2015
          Identifiers:
            – Type: issn-print
              Value: 10638210
            – Type: issn-print
              Value: 15579999
            – Type: issn-locals
              Value: edseee.IEEEJournals
          Numbering:
            – Type: volume
              Value: 23
            – Type: issue
              Value: 9
          Titles:
            – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst.
              Type: main
ResultId 1