Tang, A., Yang, Y., Lee, C., & Jha, N. (2015). McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst., 23(9), 1616. https://doi.org/10.1109/TVLSI.2014.2352354
Παραπομπή σε μορφή Chicago (17η εκδ.)Tang, A., Y. Yang, C. Lee, και N.K Jha. "McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst. 23, no. 9 (2015): 1616. https://doi.org/10.1109/TVLSI.2014.2352354.
Παραπομπή σε μορφή MLA (9th εκδ.)Tang, A., et al. "McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst., vol. 23, no. 9, 2015, p. 1616, https://doi.org/10.1109/TVLSI.2014.2352354.