Conference
A Hardware-Efficient Dual-Mode Polynomial Sampling Architecture with Hash Integration for Post-Quantum Cryptography
| Τίτλος: | A Hardware-Efficient Dual-Mode Polynomial Sampling Architecture with Hash Integration for Post-Quantum Cryptography |
|---|---|
| Συγγραφείς: | Sravya, Alahari Sri Lakshmi, Venkatapavani, Basu, Islam, MD Najrul |
| Πηγή: | 2026 30th International Symposium on VLSI Design and Test (VDAT) VLSI Design and Test (VDAT), 2026 30th International Symposium on. :7-11 Aug, 2026 |
| Relation: | 2026 30th International Symposium on VLSI Design and Test (VDAT) |
| Βάση Δεδομένων: | IEEE Xplore Digital Library |
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