An Area-Efficient CNN Accelerator for Handwritten Digit Recognition on FPGA-Based Edge Systems

Λεπτομέρειες βιβλιογραφικής εγγραφής
Τίτλος: An Area-Efficient CNN Accelerator for Handwritten Digit Recognition on FPGA-Based Edge Systems
Συγγραφείς: K, Aiswarya, Francis, Bibin, G, Lakshminarayanan, Gopi, Varun P
Πηγή: 2026 30th International Symposium on VLSI Design and Test (VDAT) VLSI Design and Test (VDAT), 2026 30th International Symposium on. :350-355 Aug, 2026
Relation: 2026 30th International Symposium on VLSI Design and Test (VDAT)
Βάση Δεδομένων: IEEE Xplore Digital Library