K, A., Francis, B., G, L., & Gopi, V. P. (2026). An Area-Efficient CNN Accelerator for Handwritten Digit Recognition on FPGA-Based Edge Systems. 2026 30th International Symposium on VLSI Design and Test (VDAT), VLSI Design and Test (VDAT), 2026 30th International Symposium on, 350. https://doi.org/10.1109/VDAT72243.2026.11704603
Παραπομπή σε μορφή Chicago (17η εκδ.)K, Aiswarya, Bibin Francis, Lakshminarayanan G, και Varun P. Gopi. "An Area-Efficient CNN Accelerator for Handwritten Digit Recognition on FPGA-Based Edge Systems." 2026 30th International Symposium on VLSI Design and Test (VDAT), VLSI Design and Test (VDAT), 2026 30th International Symposium on 2026: 350. https://doi.org/10.1109/VDAT72243.2026.11704603.
Παραπομπή σε μορφή MLA (9th εκδ.)K, Aiswarya, et al. "An Area-Efficient CNN Accelerator for Handwritten Digit Recognition on FPGA-Based Edge Systems." 2026 30th International Symposium on VLSI Design and Test (VDAT), VLSI Design and Test (VDAT), 2026 30th International Symposium on, 2026, p. 350, https://doi.org/10.1109/VDAT72243.2026.11704603.