APA (7th ed.) Citation

Talakal, M., Yeshlur, M., R, O. N., G, S., & B, R. (2026). Hybrid Signed Mac-Driven Stochastic Squeezenet for Hardware-Constrained Neural Network Inference. 2026 30th International Symposium on VLSI Design and Test (VDAT), VLSI Design and Test (VDAT), 2026 30th International Symposium on, 412. https://doi.org/10.1109/VDAT72243.2026.11704587

Chicago Style (17th ed.) Citation

Talakal, Mahanta, Mallikarjun Yeshlur, Omkar N. R, Sahithi G, and Rajeshwari B. "Hybrid Signed Mac-Driven Stochastic Squeezenet for Hardware-Constrained Neural Network Inference." 2026 30th International Symposium on VLSI Design and Test (VDAT), VLSI Design and Test (VDAT), 2026 30th International Symposium on 2026: 412. https://doi.org/10.1109/VDAT72243.2026.11704587.

MLA (9th ed.) Citation

Talakal, Mahanta, et al. "Hybrid Signed Mac-Driven Stochastic Squeezenet for Hardware-Constrained Neural Network Inference." 2026 30th International Symposium on VLSI Design and Test (VDAT), VLSI Design and Test (VDAT), 2026 30th International Symposium on, 2026, p. 412, https://doi.org/10.1109/VDAT72243.2026.11704587.