APA (7th ed.) Citation

Dai, Y., Zhu, K., Chen, M., & Wang, L. (2026). PASTE: A Physical-Aware Surrogate for FPGA Pre-Routing Timing Estimation. 2026 IEEE 37th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Application-specific Systems, Architectures and Processors (ASAP), 2026 IEEE 37th International Conference on, ASAP, 125. https://doi.org/10.1109/ASAP71856.2026.00028

Chicago Style (17th ed.) Citation

Dai, Yunfei, Kaixiang Zhu, Mingyang Chen, and Lingli Wang. "PASTE: A Physical-Aware Surrogate for FPGA Pre-Routing Timing Estimation." 2026 IEEE 37th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Application-specific Systems, Architectures and Processors (ASAP), 2026 IEEE 37th International Conference on, ASAP 2026: 125. https://doi.org/10.1109/ASAP71856.2026.00028.

MLA (9th ed.) Citation

Dai, Yunfei, et al. "PASTE: A Physical-Aware Surrogate for FPGA Pre-Routing Timing Estimation." 2026 IEEE 37th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Application-specific Systems, Architectures and Processors (ASAP), 2026 IEEE 37th International Conference on, ASAP, 2026, p. 125, https://doi.org/10.1109/ASAP71856.2026.00028.