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Open-Source Ibex RISC-V Based ISO 26262-Compliant Dual-Core Lockstep SoC with Watchdog Timer, Error Collection Unit, and Reset Controller for Automotive Safety-Critical Applications

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Title: Open-Source Ibex RISC-V Based ISO 26262-Compliant Dual-Core Lockstep SoC with Watchdog Timer, Error Collection Unit, and Reset Controller for Automotive Safety-Critical Applications
Authors: Kandregula, Madhu Babu, Mastani, S Aruna
Source: 2026 1st International Conference on VLSI Circuits and Systems (ICVCS) VLSI Circuits and Systems (ICVCS), 2026 1st International Conference on. 1:1-6 Jul, 2026
Relation: 2026 1st International Conference on VLSI Circuits and Systems (ICVCS)
Database: IEEE Xplore Digital Library
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        Value: 10.1109/ICVCS69586.2026.11683163
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      – TitleFull: Open-Source Ibex RISC-V Based ISO 26262-Compliant Dual-Core Lockstep SoC with Watchdog Timer, Error Collection Unit, and Reset Controller for Automotive Safety-Critical Applications
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            NameFull: Kandregula, Madhu Babu
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            NameFull: Mastani, S Aruna
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              Y: 2026
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