Kandregula, M. B., & Mastani, S. A. (2026). Open-Source Ibex RISC-V Based ISO 26262-Compliant Dual-Core Lockstep SoC with Watchdog Timer, Error Collection Unit, and Reset Controller for Automotive Safety-Critical Applications. 2026 1st International Conference on VLSI Circuits and Systems (ICVCS), VLSI Circuits and Systems (ICVCS), 2026 1st International Conference on, 1, 1. https://doi.org/10.1109/ICVCS69586.2026.11683163
Παραπομπή σε μορφή Chicago (17η εκδ.)Kandregula, Madhu Babu, και S Aruna Mastani. "Open-Source Ibex RISC-V Based ISO 26262-Compliant Dual-Core Lockstep SoC with Watchdog Timer, Error Collection Unit, and Reset Controller for Automotive Safety-Critical Applications." 2026 1st International Conference on VLSI Circuits and Systems (ICVCS), VLSI Circuits and Systems (ICVCS), 2026 1st International Conference on 1 (2026): 1. https://doi.org/10.1109/ICVCS69586.2026.11683163.
Παραπομπή σε μορφή MLA (9th εκδ.)Kandregula, Madhu Babu, και S Aruna Mastani. "Open-Source Ibex RISC-V Based ISO 26262-Compliant Dual-Core Lockstep SoC with Watchdog Timer, Error Collection Unit, and Reset Controller for Automotive Safety-Critical Applications." 2026 1st International Conference on VLSI Circuits and Systems (ICVCS), VLSI Circuits and Systems (ICVCS), 2026 1st International Conference on, vol. 1, 2026, p. 1, https://doi.org/10.1109/ICVCS69586.2026.11683163.