Conference
Design and Implementation of Power-Efficient RISC-V Processor
| Τίτλος: | Design and Implementation of Power-Efficient RISC-V Processor |
|---|---|
| Συγγραφείς: | Selvan, P., Karthikeyani, A., Prabhakaran, M., Siranjeevi, M., Kishore, E., Abisekar, P. |
| Πηγή: | 2026 10th International Conference on Inventive Systems and Control (ICISC) Inventive Systems and Control (ICISC), 2026 10th International Conference on. :158-164 Aug, 2026 |
| Relation: | 2026 10th International Conference on Inventive Systems and Control (ICISC) |
| Βάση Δεδομένων: | IEEE Xplore Digital Library |
| FullText | Text: Availability: 0 |
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| Header | DbId: edseee DbLabel: IEEE Xplore Digital Library An: edseee.11681729 RelevancyScore: 1178 AccessLevel: 2 PubType: Conference PubTypeId: conference PreciseRelevancyScore: 1177.97338867188 |
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| Items | – Name: Title Label: Title Group: Ti Data: Design and Implementation of Power-Efficient RISC-V Processor – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Selvan%2C+P%2E%22">Selvan, P.</searchLink><br /><searchLink fieldCode="AR" term="%22Karthikeyani%2C+A%2E%22">Karthikeyani, A.</searchLink><br /><searchLink fieldCode="AR" term="%22Prabhakaran%2C+M%2E%22">Prabhakaran, M.</searchLink><br /><searchLink fieldCode="AR" term="%22Siranjeevi%2C+M%2E%22">Siranjeevi, M.</searchLink><br /><searchLink fieldCode="AR" term="%22Kishore%2C+E%2E%22">Kishore, E.</searchLink><br /><searchLink fieldCode="AR" term="%22Abisekar%2C+P%2E%22">Abisekar, P.</searchLink> – Name: TitleSource Label: Source Group: Src Data: 2026 10th International Conference on Inventive Systems and Control (ICISC) Inventive Systems and Control (ICISC), 2026 10th International Conference on. :158-164 Aug, 2026 – Name: NoteTitleSource Label: Relation Group: SrcInfo Data: 2026 10th International Conference on Inventive Systems and Control (ICISC) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.11681729 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/ICISC69558.2026.11681729 PhysicalDescription: Pagination: PageCount: 7 StartPage: 158 Titles: – TitleFull: Design and Implementation of Power-Efficient RISC-V Processor Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Selvan, P. – PersonEntity: Name: NameFull: Karthikeyani, A. – PersonEntity: Name: NameFull: Prabhakaran, M. – PersonEntity: Name: NameFull: Siranjeevi, M. – PersonEntity: Name: NameFull: Kishore, E. – PersonEntity: Name: NameFull: Abisekar, P. IsPartOfRelationships: – BibEntity: Dates: – D: 05 M: 08 Type: published Y: 2026 Identifiers: – Type: isbn-print Value: 9798331545086 – Type: isbn-print Value: 9798331545079 – Type: isbn-print Value: 9798331545093 – Type: issn-locals Value: edseee.IEEEConferenc Titles: – TitleFull: 2026 10th International Conference on Inventive Systems and Control (ICISC), Inventive Systems and Control (ICISC), 2026 10th International Conference on Type: main |
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