Selvan, P., Karthikeyani, A., Prabhakaran, M., Siranjeevi, M., Kishore, E., & Abisekar, P. (2026). Design and Implementation of Power-Efficient RISC-V Processor. 2026 10th International Conference on Inventive Systems and Control (ICISC), Inventive Systems and Control (ICISC), 2026 10th International Conference on, 158. https://doi.org/10.1109/ICISC69558.2026.11681729
Παραπομπή σε μορφή Chicago (17η εκδ.)Selvan, P., A. Karthikeyani, M. Prabhakaran, M. Siranjeevi, E. Kishore, και P. Abisekar. "Design and Implementation of Power-Efficient RISC-V Processor." 2026 10th International Conference on Inventive Systems and Control (ICISC), Inventive Systems and Control (ICISC), 2026 10th International Conference on 2026: 158. https://doi.org/10.1109/ICISC69558.2026.11681729.
Παραπομπή σε μορφή MLA (9th εκδ.)Selvan, P., et al. "Design and Implementation of Power-Efficient RISC-V Processor." 2026 10th International Conference on Inventive Systems and Control (ICISC), Inventive Systems and Control (ICISC), 2026 10th International Conference on, 2026, p. 158, https://doi.org/10.1109/ICISC69558.2026.11681729.