Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier

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Τίτλος: Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier
Συγγραφείς: Thirion, Daniel, Daveau, Jean-Marc, Egloff, Valentin, Beroulle, Vincent, Roche, Philippe, Hely, David
Πηγή: 2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS) On-Line Testing and Robust System Design (IOLTS), 2026 IEEE 32nd International Symposium on. :1-7 Jul, 2026
Relation: 2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS)
Βάση Δεδομένων: IEEE Xplore Digital Library
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An: edseee.11633851
RelevancyScore: 1161
AccessLevel: 2
PubType: Conference
PubTypeId: conference
PreciseRelevancyScore: 1160.63671875
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Thirion%2C+Daniel%22">Thirion, Daniel</searchLink><br /><searchLink fieldCode="AR" term="%22Daveau%2C+Jean-Marc%22">Daveau, Jean-Marc</searchLink><br /><searchLink fieldCode="AR" term="%22Egloff%2C+Valentin%22">Egloff, Valentin</searchLink><br /><searchLink fieldCode="AR" term="%22Beroulle%2C+Vincent%22">Beroulle, Vincent</searchLink><br /><searchLink fieldCode="AR" term="%22Roche%2C+Philippe%22">Roche, Philippe</searchLink><br /><searchLink fieldCode="AR" term="%22Hely%2C+David%22">Hely, David</searchLink>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: 2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS) On-Line Testing and Robust System Design (IOLTS), 2026 IEEE 32nd International Symposium on. :1-7 Jul, 2026
– Name: NoteTitleSource
  Label: Relation
  Group: SrcInfo
  Data: 2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS)
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.11633851
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1109/IOLTS69666.2026.11633851
    PhysicalDescription:
      Pagination:
        PageCount: 7
        StartPage: 1
    Titles:
      – TitleFull: Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Thirion, Daniel
      – PersonEntity:
          Name:
            NameFull: Daveau, Jean-Marc
      – PersonEntity:
          Name:
            NameFull: Egloff, Valentin
      – PersonEntity:
          Name:
            NameFull: Beroulle, Vincent
      – PersonEntity:
          Name:
            NameFull: Roche, Philippe
      – PersonEntity:
          Name:
            NameFull: Hely, David
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 07
              Type: published
              Y: 2026
          Identifiers:
            – Type: isbn-print
              Value: 9798331546854
            – Type: isbn-print
              Value: 9798331546861
            – Type: issn-print
              Value: 19429401
            – Type: issn-print
              Value: 19429398
            – Type: issn-locals
              Value: edseee.IEEEConferenc
          Titles:
            – TitleFull: 2026 IEEE 32nd International Symposium on On-Line Testing and Robust System Design (IOLTS), On-Line Testing and Robust System Design (IOLTS), 2026 IEEE 32nd International Symposium on
              Type: main
ResultId 1