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HEADS: Accuracy--Makespan Co-Optimization for Multitenant Multi-FPGA Edge Systems

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Title: HEADS: Accuracy--Makespan Co-Optimization for Multitenant Multi-FPGA Edge Systems
Authors: Kersz, I., Ely, A.F., Jordan, M.G., Azambuja, J.R., Kastensmidt, F.L., Beck, A.C.S.
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3116-3125 Oct, 2026
Database: IEEE Xplore Digital Library
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  Data: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3116-3125 Oct, 2026
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        Value: 10.1109/TVLSI.2026.3716149
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        StartPage: 3116
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              Type: published
              Y: 2026
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