Cui, J., Qin, L., Cai, W., & Huang, J. (2026). Mapping and Communication Optimizations with Fault Tolerance for Wafer-Scale LLM Inference. 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on, ISCA, 951. https://doi.org/10.1109/ISCA66397.2026.00076
Παραπομπή σε μορφή Chicago (17η εκδ.)Cui, Junwei, Le Qin, Weilin Cai, και Jiayi Huang. "Mapping and Communication Optimizations with Fault Tolerance for Wafer-Scale LLM Inference." 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on, ISCA 2026: 951. https://doi.org/10.1109/ISCA66397.2026.00076.
Παραπομπή σε μορφή MLA (9th εκδ.)Cui, Junwei, et al. "Mapping and Communication Optimizations with Fault Tolerance for Wafer-Scale LLM Inference." 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on, ISCA, 2026, p. 951, https://doi.org/10.1109/ISCA66397.2026.00076.