Du, Y., Wang, M., Li, C., Han, Y., & Wang, Y. (2026). Unlocking Pipeline Parallelism for Bootstrapping: A Pipelined Multi-Chiplet TFHE Accelerator. 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on, ISCA, 1924. https://doi.org/10.1109/ISCA66397.2026.00138
Παραπομπή σε μορφή Chicago (17η εκδ.)Du, Yibo, Mengdi Wang, Cangyuan Li, Yinhe Han, και Ying Wang. "Unlocking Pipeline Parallelism for Bootstrapping: A Pipelined Multi-Chiplet TFHE Accelerator." 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on, ISCA 2026: 1924. https://doi.org/10.1109/ISCA66397.2026.00138.
Παραπομπή σε μορφή MLA (9th εκδ.)Du, Yibo, et al. "Unlocking Pipeline Parallelism for Bootstrapping: A Pipelined Multi-Chiplet TFHE Accelerator." 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA), Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on, ISCA, 2026, p. 1924, https://doi.org/10.1109/ISCA66397.2026.00138.