Jerusha, D., Babu, B. C., & Muni Reddy Yanamala, R. (2026). Bridging Quantum and Classical: FPGA-Based Emulation of the Draper Adder Algorithm. 2026 IEEE 6th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA), VLSI Systems, Architecture, Technology and Applications (VLSI SATA), 2026 IEEE 6th International Conference on, 1. https://doi.org/10.1109/VLSISATA69163.2026.11610028
Παραπομπή σε μορφή Chicago (17η εκδ.)Jerusha, Delphina, B. Chitti Babu, και Rama Muni Reddy Yanamala. "Bridging Quantum and Classical: FPGA-Based Emulation of the Draper Adder Algorithm." 2026 IEEE 6th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA), VLSI Systems, Architecture, Technology and Applications (VLSI SATA), 2026 IEEE 6th International Conference on 2026: 1. https://doi.org/10.1109/VLSISATA69163.2026.11610028.
Παραπομπή σε μορφή MLA (9th εκδ.)Jerusha, Delphina, et al. "Bridging Quantum and Classical: FPGA-Based Emulation of the Draper Adder Algorithm." 2026 IEEE 6th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA), VLSI Systems, Architecture, Technology and Applications (VLSI SATA), 2026 IEEE 6th International Conference on, 2026, p. 1, https://doi.org/10.1109/VLSISATA69163.2026.11610028.