Conference
An Area-Efficient Neural Stimulator Chip Achieving 23V Voltage Compliance by 180nm BCD CMOS process
| Τίτλος: | An Area-Efficient Neural Stimulator Chip Achieving 23V Voltage Compliance by 180nm BCD CMOS process |
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| Συγγραφείς: | Li, Zherui, Han, Cheng, Xiao, Qijing, Wang, Weixiao, Zhang, Yunshan, Zhou, Jun, Zhao, Bo |
| Πηγή: | 2026 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2026 IEEE International Symposium on. :3421-3425 May, 2026 |
| Relation: | 2026 IEEE International Symposium on Circuits and Systems (ISCAS) |
| Βάση Δεδομένων: | IEEE Xplore Digital Library |
| ISBN: | 9798331577698 9798331577704 |
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| ISSN: | 21581525 02714302 |
| DOI: | 10.1109/ISCAS66217.2026.11562486 |