A Novel Latch Reset Technique Enabling Sub- $6 \mu ~\mathrm{W}$ Operation in Double-Tail Comparator

Λεπτομέρειες βιβλιογραφικής εγγραφής
Τίτλος: A Novel Latch Reset Technique Enabling Sub- $6 \mu ~\mathrm{W}$ Operation in Double-Tail Comparator
Συγγραφείς: Dubey, Aditya, Rathore, Sunil, Bagga, Navjeet
Πηγή: 2026 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems (VLSID) VLSID VLSI Design & 25th International Conference on Embedded Systems (VLSID), 2026 39th International Conference on. :443-448 Jan, 2026
Relation: 2026 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems (VLSID)
Βάση Δεδομένων: IEEE Xplore Digital Library
Περιγραφή
ISBN:9798331590406
9798331590413
ISSN:23806923
10639667
DOI:10.1109/VLSID68508.2026.00089