Conference
An Algorithm-Hardware Co-Design for Efficient and Robust Spiking Neural Networks via Sparsity
| Τίτλος: | An Algorithm-Hardware Co-Design for Efficient and Robust Spiking Neural Networks via Sparsity |
|---|---|
| Συγγραφείς: | Liu, Wei, Chen, Yinsheng, Luo, Jilong, Wang, Yusa, Yu, Zhiyi, Xiao, Shanlin |
| Πηγή: | 2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC) Design Automation Conference (ASP-DAC), 2026 31st Asia and South Pacific. :126-132 Jan, 2026 |
| Relation: | 2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC) |
| Βάση Δεδομένων: | IEEE Xplore Digital Library |
| FullText | Text: Availability: 0 |
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| Header | DbId: edseee DbLabel: IEEE Xplore Digital Library An: edseee.11420466 RelevancyScore: 1131 AccessLevel: 2 PubType: Conference PubTypeId: conference PreciseRelevancyScore: 1130.63806152344 |
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| Items | – Name: Title Label: Title Group: Ti Data: An Algorithm-Hardware Co-Design for Efficient and Robust Spiking Neural Networks via Sparsity – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Liu%2C+Wei%22">Liu, Wei</searchLink><br /><searchLink fieldCode="AR" term="%22Chen%2C+Yinsheng%22">Chen, Yinsheng</searchLink><br /><searchLink fieldCode="AR" term="%22Luo%2C+Jilong%22">Luo, Jilong</searchLink><br /><searchLink fieldCode="AR" term="%22Wang%2C+Yusa%22">Wang, Yusa</searchLink><br /><searchLink fieldCode="AR" term="%22Yu%2C+Zhiyi%22">Yu, Zhiyi</searchLink><br /><searchLink fieldCode="AR" term="%22Xiao%2C+Shanlin%22">Xiao, Shanlin</searchLink> – Name: TitleSource Label: Source Group: Src Data: 2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC) Design Automation Conference (ASP-DAC), 2026 31st Asia and South Pacific. :126-132 Jan, 2026 – Name: NoteTitleSource Label: Relation Group: SrcInfo Data: 2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edseee&AN=edseee.11420466 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/ASP-DAC66049.2026.11420466 PhysicalDescription: Pagination: PageCount: 7 StartPage: 126 Titles: – TitleFull: An Algorithm-Hardware Co-Design for Efficient and Robust Spiking Neural Networks via Sparsity Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Liu, Wei – PersonEntity: Name: NameFull: Chen, Yinsheng – PersonEntity: Name: NameFull: Luo, Jilong – PersonEntity: Name: NameFull: Wang, Yusa – PersonEntity: Name: NameFull: Yu, Zhiyi – PersonEntity: Name: NameFull: Xiao, Shanlin IsPartOfRelationships: – BibEntity: Dates: – D: 19 M: 01 Type: published Y: 2026 Identifiers: – Type: isbn-print Value: 9798331591236 – Type: isbn-print Value: 9798331591243 – Type: issn-print Value: 2153697X – Type: issn-print Value: 21536961 – Type: issn-locals Value: edseee.IEEEConferenc Titles: – TitleFull: 2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC), Design Automation Conference (ASP-DAC), 2026 31st Asia and South Pacific Type: main |
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