Choudhary, D. K., Ajnar, D. S., Mahant, R., Gurjar, R. C., Khatri, R., & Yadav, A. (2025). Design and Comparative Analysis of Arithmetic Logic Unit Using Full Adder in SCL 180nm CMOS Technology. 2025 IEEE International Conference on Advances in Computing Research On Science Engineering and Technology (ACROSET), Advances in Computing Research On Science Engineering and Technology (ACROSET), 2025 IEEE International Conference on, 1. https://doi.org/10.1109/ACROSET66531.2025.11280653
Παραπομπή σε μορφή Chicago (17η εκδ.)Choudhary, Dinesh Kumar, D. S. Ajnar, Rupali Mahant, R. C. Gurjar, Rajesh Khatri, και Anand Yadav. "Design and Comparative Analysis of Arithmetic Logic Unit Using Full Adder in SCL 180nm CMOS Technology." 2025 IEEE International Conference on Advances in Computing Research On Science Engineering and Technology (ACROSET), Advances in Computing Research On Science Engineering and Technology (ACROSET), 2025 IEEE International Conference on 2025: 1. https://doi.org/10.1109/ACROSET66531.2025.11280653.
Παραπομπή σε μορφή MLA (9th εκδ.)Choudhary, Dinesh Kumar, et al. "Design and Comparative Analysis of Arithmetic Logic Unit Using Full Adder in SCL 180nm CMOS Technology." 2025 IEEE International Conference on Advances in Computing Research On Science Engineering and Technology (ACROSET), Advances in Computing Research On Science Engineering and Technology (ACROSET), 2025 IEEE International Conference on, 2025, p. 1, https://doi.org/10.1109/ACROSET66531.2025.11280653.