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Implementation and Performance Evaluation of Fundamental Sorting Algorithms Using Verilog

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Title: Implementation and Performance Evaluation of Fundamental Sorting Algorithms Using Verilog
Authors: Mendez, Tanya, V, Ghanashyam N, Balakrishnan, Amritha, Puthalath, Aswanth
Source: 2025 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), 2025 IEEE International Conference on. :679-685 Oct, 2025
Relation: 2025 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)
Database: IEEE Xplore Digital Library
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PubType: Conference
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  Data: Implementation and Performance Evaluation of Fundamental Sorting Algorithms Using Verilog
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  Data: 2025 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), 2025 IEEE International Conference on. :679-685 Oct, 2025
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RecordInfo BibRecord:
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      – Type: doi
        Value: 10.1109/DISCOVER66922.2025.11258998
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        PageCount: 7
        StartPage: 679
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      – TitleFull: Implementation and Performance Evaluation of Fundamental Sorting Algorithms Using Verilog
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            NameFull: Mendez, Tanya
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            NameFull: V, Ghanashyam N
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            NameFull: Balakrishnan, Amritha
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            NameFull: Puthalath, Aswanth
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              Type: published
              Y: 2025
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            – TitleFull: 2025 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), 2025 IEEE International Conference on
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