A 43.3 bit/cycle Inflate Accelerator Featuring Static-Dynamic Huffman Decoder with Multiple Checkpoints and Optimized End-Of-Block Control for Hyperscale data

Λεπτομέρειες βιβλιογραφικής εγγραφής
Τίτλος: A 43.3 bit/cycle Inflate Accelerator Featuring Static-Dynamic Huffman Decoder with Multiple Checkpoints and Optimized End-Of-Block Control for Hyperscale data
Συγγραφείς: Zhang, Wei, Luo, Yiwei, Zhang, Yangyi, Ouyang, Jiaqi, Wang, Guodong, Wang, Xianglong, Shi, Gang, Chen, Lei, An, Fengwei
Πηγή: 2024 IEEE Asian Solid-State Circuits Conference (A-SSCC) Solid-State Circuits Conference (A-SSCC), 2024 IEEE Asian. :1-3 Nov, 2024
Relation: 2024 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Βάση Δεδομένων: IEEE Xplore Digital Library