Academic Journal
Optimizing CMOS-compatible, superconducting titanium nitride resonators: Deposition conditions and structuring processes
| Τίτλος: | Optimizing CMOS-compatible, superconducting titanium nitride resonators: Deposition conditions and structuring processes |
|---|---|
| Συγγραφείς: | Lang, S. J. K., Schewski, A., Eisele, I., Weber, J., Guizan, C. Moran, Luo, Z., Singer, M., Schoof, B., Tornow, M., Mayer, T., Zahn, D., Pereira, R. N., Kutter, C. |
| Συνεισφορές: | German Ministery of Eduction and Research, Elitenetzwerk Bayern, European Commission |
| Πηγή: | Applied Physics Reviews ; volume 13, issue 3 ; ISSN 1931-9401 |
| Στοιχεία εκδότη: | AIP Publishing |
| Έτος έκδοσης: | 2026 |
| Περιγραφή: | We report on the fabrication and characterization of superconducting coplanar waveguide resonators based on titanium nitride (TiN) thin films deposited on 200 mm diameter high-resistivity Si(100) substrates. We systematically investigate how deposition conditions, dry-etch power, and in situ resist strip temperature affect morphology, superconducting properties and dielectric losses. By tuning reactive sputtering conditions, three distinct preferred out-of-plane crystal orientations—(111), (200), and a mix of both—are achieved. Our results demonstrate that all films exhibit similar minimal two-level system (TLS) losses, with TiN111 exhibiting the lowest median TLS losses δ̃TLS, and greater robustness against reoxidation. The applied structuring process, in contrast, has a far greater influence on the TLS loss than the crystal orientation of the TiN film and, consequently, the intrinsic material properties of the superconducting layer. The lowest TLS losses for all TiN depositions were achieved with a low power etch and low temperature resist strip. An additional buffered oxide etch treatment could remove high-loss interfacial oxides at the metal–air (MA) and substrate–air (SA) interface and recover the etch-induced TLS losses. Consequently, TiN resonators exhibiting δ̃TLS values as low as 9.67×10−7 were realized. The corresponding median low-power loss, δ̃LP, amounts to 11.04×10−7, which translates to an internal quality factor approaching one million. These findings highlight the critical role of process-induced oxide formation at the MA and SA interfaces in limiting the performance of TiN resonators and provide a scalable, low-loss process compatible with industry-grade 200 mm CMOS qubit fabrication workflows. |
| Τύπος εγγράφου: | article in journal/newspaper |
| Γλώσσα: | English |
| DOI: | 10.1063/5.0331943 |
| DOI: | 10.1063/5.0331943/21076623/031403_1_5.0331943.pdf |
| Διαθεσιμότητα: | https://doi.org/10.1063/5.0331943 https://pubs.aip.org/aip/apr/article-pdf/doi/10.1063/5.0331943/21076623/031403_1_5.0331943.pdf |
| Rights: | https://creativecommons.org/licenses/by/4.0/ |
| Αριθμός Καταχώρησης: | edsbas.ED727C5A |
| Βάση Δεδομένων: | BASE |
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