Academic Journal
Can We Trust Undervolting in FPGA-Based Deep Learning Designs at Harsh Conditions?
| Title: | Can We Trust Undervolting in FPGA-Based Deep Learning Designs at Harsh Conditions? |
|---|---|
| Authors: | Fahrettin Koc, Behzad Salami, Oguz Ergin, Osman Unsal, Adrian Cristal Kestelman |
| Contributors: | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
| Source: | UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) |
| Publisher Information: | Institute of Electrical and Electronics Engineers (IEEE), 2022. |
| Publication Year: | 2022 |
| Subject Terms: | Benchmark testing, Matrius de portes programables per l'usuari, Àrees temàtiques de la UPC::Informàtica::Intel·ligència artificial::Aprenentatge automàtic, Field programmable gate arrays, Deep learning, Voltage, Humidity, 02 engineering and technology, Temperature distribution, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors, 0202 electrical engineering, electronic engineering, information engineering, Temperature sensors, Electronic data processing -- Distributed processing, Aprenentatge profund, Processament distribuït de dades |
| Description: | As more Neural Networks on Field Programmable Gate Arrays (FPGAs) are used in a wider context, the importance of power efficiency increases. However, the focus on power should never compromise application accuracy. One technique to increase power efficiency is reducing the FPGAs' supply voltage ("undervolting"), which can cause accuracy problems. Therefore, careful design-time considerations are required for correct configuration without hindering the target accuracy. This fact becomes especially important for autonomous systems, edge-computing, or data-centers. This study reveals the impact of undervolting in harsh environmental conditions on the accuracy and power efficiency of the convolutional neural network benchmarks. We perform the comprehensive testing in a calibrated infrastructure at controlled temperatures (between -40C and 50C) and four distinct humidity levels (40%, 50%, 70%, 80%) for off-the-shelf FPGAs. We show the voltage guard-band shift with temperature is linear and propose new reliable undervolting designs providing a 65% increase in power efficiency (GOPS/W). |
| Document Type: | Article Other literature type |
| File Description: | application/pdf |
| ISSN: | 1937-4143 0272-1732 |
| DOI: | 10.1109/mm.2022.3153891 |
| DOI: | 10.1109/mm.2022.315389110.1109/mm.2022.3153891 |
| Access URL: | https://hdl.handle.net/20.500.11851/8602 https://doi.org/10.1109/MM.2022.3153891 10.1109/MM.2022.3153891 https://hdl.handle.net/20.500.11851/8602 https://doi.org/10.1109/MM.2022.3153891 |
| Rights: | IEEE Copyright |
| Accession Number: | edsair.doi.dedup.....613f5ce4625f1c2939176bcf57c79df6 |
| Database: | OpenAIRE |
| ISSN: | 19374143 02721732 |
|---|---|
| DOI: | 10.1109/mm.2022.3153891 |