Shailaja, J., & Ravindran, E. (2026). Design of 18-Bit Resolution CT Delta-Sigma ADCs Using Single-Ended DAC with Mixed-Signal Calibration and OTA With Optimized Transconductance to Drain Current Ratio. Circuits, Systems & Signal Processing, 45(7), 5163. https://doi.org/10.1007/s00034-025-03461-7
Παραπομπή σε μορφή Chicago (17η εκδ.)Shailaja, J., και Ernest Ravindran. "Design of 18-Bit Resolution CT Delta-Sigma ADCs Using Single-Ended DAC with Mixed-Signal Calibration and OTA With Optimized Transconductance to Drain Current Ratio." Circuits, Systems & Signal Processing 45, no. 7 (2026): 5163. https://doi.org/10.1007/s00034-025-03461-7.
Παραπομπή σε μορφή MLA (9th εκδ.)Shailaja, J., και Ernest Ravindran. "Design of 18-Bit Resolution CT Delta-Sigma ADCs Using Single-Ended DAC with Mixed-Signal Calibration and OTA With Optimized Transconductance to Drain Current Ratio." Circuits, Systems & Signal Processing, vol. 45, no. 7, 2026, p. 5163, https://doi.org/10.1007/s00034-025-03461-7.