Academic Journal
Implementation Efficiency of Falcon Digital Signature Scheme on Arty-7 XC7A35T Board.
| Τίτλος: | Implementation Efficiency of Falcon Digital Signature Scheme on Arty-7 XC7A35T Board. |
|---|---|
| Συγγραφείς: | Nguyen, Tat-Thang, Nguyen, Duc-Duy, Dao, Toan-Thanh, Luc, Nhu-Quynh |
| Πηγή: | Electronics (2079-9292); Nov2025, Vol. 14 Issue 22, p4504, 21p |
| Θεματικοί όροι: | Digital signatures, Field programmable gate arrays, Microsoft .NET Framework, Mathematical optimization, Embedded computer systems |
| Περίληψη: | In this study, the authors propose a solution for implementing a digital signature system using the post-quantum digital signature scheme Falcon on the FPGA hardware platform XC7A35T-CPG236. The system is combined with a software component developed in C# using the NET Framework 4.7, capable of running on the Windows operating system. Falcon is selected for its compact signature size and high computational performance, optimizing the signing and verification processes on hardware. The system is designed to leverage the hardware acceleration capabilities of an FPGA to enhance performance compared to software-only signature methods. The integration of the Falcon scheme into both hardware (FPGA) and software components ensures high flexibility for real-world deployment. The obtained results show that key generation execution time is approximately 1516.2 ms, while the signing and verification times are around 2–5 ms. Hardware resource usage has significantly improved, and the power consumption is 0.097 W (57%). However, the software component has not yet undergone thorough security testing. Given the achieved results in terms of execution time and energy consumption, the proposed device and software may be suitable for certain applications that do not require stringent performance and energy constraints. Furthermore, this research demonstrates the feasibility of deploying post-quantum cryptographic solutions on embedded hardware platforms, contributing to the development of secure communication systems in the future. [ABSTRACT FROM AUTHOR] |
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| Βάση Δεδομένων: | Complementary Index |
| FullText | Text: Availability: 0 CustomLinks: – Url: https://resolver.ebsco.com/c/fiv2js/result?sid=EBSCO:edb&genre=article&issn=20799292&ISBN=&volume=14&issue=22&date=20251115&spage=4504&pages=4504-4524&title=Electronics (2079-9292)&atitle=Implementation%20Efficiency%20of%20Falcon%20Digital%20Signature%20Scheme%20on%20Arty-7%20XC7A35T%20Board.&aulast=Nguyen%2C%20Tat-Thang&id=DOI:10.3390/electronics14224504 Name: Full Text Finder (for New FTF UI) (ns324271) Category: fullText Text: Full Text Finder MouseOverText: Full Text Finder |
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| Items | – Name: Title Label: Title Group: Ti Data: Implementation Efficiency of Falcon Digital Signature Scheme on Arty-7 XC7A35T Board. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Nguyen%2C+Tat-Thang%22">Nguyen, Tat-Thang</searchLink><br /><searchLink fieldCode="AR" term="%22Nguyen%2C+Duc-Duy%22">Nguyen, Duc-Duy</searchLink><br /><searchLink fieldCode="AR" term="%22Dao%2C+Toan-Thanh%22">Dao, Toan-Thanh</searchLink><br /><searchLink fieldCode="AR" term="%22Luc%2C+Nhu-Quynh%22">Luc, Nhu-Quynh</searchLink> – Name: TitleSource Label: Source Group: Src Data: Electronics (2079-9292); Nov2025, Vol. 14 Issue 22, p4504, 21p – Name: Subject Label: Subject Terms Group: Su Data: <searchLink fieldCode="DE" term="%22Digital+signatures%22">Digital signatures</searchLink><br /><searchLink fieldCode="DE" term="%22Field+programmable+gate+arrays%22">Field programmable gate arrays</searchLink><br /><searchLink fieldCode="DE" term="%22Microsoft+%2ENET+Framework%22">Microsoft .NET Framework</searchLink><br /><searchLink fieldCode="DE" term="%22Mathematical+optimization%22">Mathematical optimization</searchLink><br /><searchLink fieldCode="DE" term="%22Embedded+computer+systems%22">Embedded computer systems</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In this study, the authors propose a solution for implementing a digital signature system using the post-quantum digital signature scheme Falcon on the FPGA hardware platform XC7A35T-CPG236. The system is combined with a software component developed in C# using the NET Framework 4.7, capable of running on the Windows operating system. Falcon is selected for its compact signature size and high computational performance, optimizing the signing and verification processes on hardware. The system is designed to leverage the hardware acceleration capabilities of an FPGA to enhance performance compared to software-only signature methods. The integration of the Falcon scheme into both hardware (FPGA) and software components ensures high flexibility for real-world deployment. The obtained results show that key generation execution time is approximately 1516.2 ms, while the signing and verification times are around 2–5 ms. Hardware resource usage has significantly improved, and the power consumption is 0.097 W (57%). However, the software component has not yet undergone thorough security testing. Given the achieved results in terms of execution time and energy consumption, the proposed device and software may be suitable for certain applications that do not require stringent performance and energy constraints. Furthermore, this research demonstrates the feasibility of deploying post-quantum cryptographic solutions on embedded hardware platforms, contributing to the development of secure communication systems in the future. [ABSTRACT FROM AUTHOR] – Name: Abstract Label: Group: Ab Data: <i>Copyright of Electronics (2079-9292) is the property of MDPI and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.3390/electronics14224504 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 21 StartPage: 4504 Subjects: – SubjectFull: Digital signatures Type: general – SubjectFull: Field programmable gate arrays Type: general – SubjectFull: Microsoft .NET Framework Type: general – SubjectFull: Mathematical optimization Type: general – SubjectFull: Embedded computer systems Type: general Titles: – TitleFull: Implementation Efficiency of Falcon Digital Signature Scheme on Arty-7 XC7A35T Board. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Nguyen, Tat-Thang – PersonEntity: Name: NameFull: Nguyen, Duc-Duy – PersonEntity: Name: NameFull: Dao, Toan-Thanh – PersonEntity: Name: NameFull: Luc, Nhu-Quynh IsPartOfRelationships: – BibEntity: Dates: – D: 15 M: 11 Text: Nov2025 Type: published Y: 2025 Identifiers: – Type: issn-print Value: 20799292 Numbering: – Type: volume Value: 14 – Type: issue Value: 22 Titles: – TitleFull: Electronics (2079-9292) Type: main |
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