Academic Journal
Specifying and Verifying Programs Over the MCA ARMv8 Architecture with TLA+.
| Τίτλος: | Specifying and Verifying Programs Over the MCA ARMv8 Architecture with TLA+. |
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| Συγγραφείς: | Xiao, Lili, Hou, Zhiru, Zhu, Huibiao, He, Mengda, Qin, Shengchao |
| Πηγή: | Journal of Circuits, Systems & Computers; 1/15/2026, Vol. 35 Issue 1, p1-21, 21p |
| Θεματικοί όροι: | Software verification, Computer architecture, Synchronization, Formal methods (Computer science), Formal languages, Parallel programs (Computer programs), Parallel processing |
| Περίληψη: | Modern hardware architectures and mainstream programming languages employ relaxed memory models for efficiency purposes. However, these memory models may bring in many behaviors which do not adhere to people's intuition. In addition, different relaxed memory models produce different relaxed behaviors. The existing facts make the verification of the multi-threaded programs running against these models more difficult. In this paper, we are committed to proposing a general framework for modeling and verifying programs over various relaxed memory models, and we take the MCA ARMv8 architecture as an example. This architecture allows out-of-order execution through thread-local out-of-order, speculative execution and thread-local buffering. Above all, through analyzing the dependencies among statements, any program under MCA ARMv8 is translated into a unified form, which has the ability to describe each program under various memory models. Then, we model the translated programs with the formal specification language TLA + , and verify three properties, namely Reordering, Read-after-write elimination and Barriers, by the model checker TLC. Our verification results indicate that these properties align with the specification of MCA ARMv8. This not only validates the effectiveness of our method but also provides a more consistent approach for ensuring program correctness across a wide range of memory models. [ABSTRACT FROM AUTHOR] |
| Copyright of Journal of Circuits, Systems & Computers is the property of World Scientific Publishing Company and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Βάση Δεδομένων: | Complementary Index |
| FullText | Text: Availability: 0 |
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| Header | DbId: edb DbLabel: Complementary Index An: 188605686 RelevancyScore: 1041 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 1041.06652832031 |
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| Items | – Name: Title Label: Title Group: Ti Data: Specifying and Verifying Programs Over the MCA ARMv8 Architecture with TLA+. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Xiao%2C+Lili%22">Xiao, Lili</searchLink><br /><searchLink fieldCode="AR" term="%22Hou%2C+Zhiru%22">Hou, Zhiru</searchLink><br /><searchLink fieldCode="AR" term="%22Zhu%2C+Huibiao%22">Zhu, Huibiao</searchLink><br /><searchLink fieldCode="AR" term="%22He%2C+Mengda%22">He, Mengda</searchLink><br /><searchLink fieldCode="AR" term="%22Qin%2C+Shengchao%22">Qin, Shengchao</searchLink> – Name: TitleSource Label: Source Group: Src Data: Journal of Circuits, Systems & Computers; 1/15/2026, Vol. 35 Issue 1, p1-21, 21p – Name: Subject Label: Subject Terms Group: Su Data: <searchLink fieldCode="DE" term="%22Software+verification%22">Software verification</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+architecture%22">Computer architecture</searchLink><br /><searchLink fieldCode="DE" term="%22Synchronization%22">Synchronization</searchLink><br /><searchLink fieldCode="DE" term="%22Formal+methods+%28Computer+science%29%22">Formal methods (Computer science)</searchLink><br /><searchLink fieldCode="DE" term="%22Formal+languages%22">Formal languages</searchLink><br /><searchLink fieldCode="DE" term="%22Parallel+programs+%28Computer+programs%29%22">Parallel programs (Computer programs)</searchLink><br /><searchLink fieldCode="DE" term="%22Parallel+processing%22">Parallel processing</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Modern hardware architectures and mainstream programming languages employ relaxed memory models for efficiency purposes. However, these memory models may bring in many behaviors which do not adhere to people's intuition. In addition, different relaxed memory models produce different relaxed behaviors. The existing facts make the verification of the multi-threaded programs running against these models more difficult. In this paper, we are committed to proposing a general framework for modeling and verifying programs over various relaxed memory models, and we take the MCA ARMv8 architecture as an example. This architecture allows out-of-order execution through thread-local out-of-order, speculative execution and thread-local buffering. Above all, through analyzing the dependencies among statements, any program under MCA ARMv8 is translated into a unified form, which has the ability to describe each program under various memory models. Then, we model the translated programs with the formal specification language TLA + , and verify three properties, namely Reordering, Read-after-write elimination and Barriers, by the model checker TLC. Our verification results indicate that these properties align with the specification of MCA ARMv8. This not only validates the effectiveness of our method but also provides a more consistent approach for ensuring program correctness across a wide range of memory models. [ABSTRACT FROM AUTHOR] – Name: Abstract Label: Group: Ab Data: <i>Copyright of Journal of Circuits, Systems & Computers is the property of World Scientific Publishing Company and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1142/S0218126625300089 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 21 StartPage: 1 Subjects: – SubjectFull: Software verification Type: general – SubjectFull: Computer architecture Type: general – SubjectFull: Synchronization Type: general – SubjectFull: Formal methods (Computer science) Type: general – SubjectFull: Formal languages Type: general – SubjectFull: Parallel programs (Computer programs) Type: general – SubjectFull: Parallel processing Type: general Titles: – TitleFull: Specifying and Verifying Programs Over the MCA ARMv8 Architecture with TLA+. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Xiao, Lili – PersonEntity: Name: NameFull: Hou, Zhiru – PersonEntity: Name: NameFull: Zhu, Huibiao – PersonEntity: Name: NameFull: He, Mengda – PersonEntity: Name: NameFull: Qin, Shengchao IsPartOfRelationships: – BibEntity: Dates: – D: 15 M: 01 Text: 1/15/2026 Type: published Y: 2026 Identifiers: – Type: issn-print Value: 02181266 Numbering: – Type: volume Value: 35 – Type: issue Value: 1 Titles: – TitleFull: Journal of Circuits, Systems & Computers Type: main |
| ResultId | 1 |