Λεπτομέρειες βιβλιογραφικής εγγραφής
| Τίτλος: |
一种多端口寄存器文件的全自动物理编译器. (Chinese) |
| Alternate Title: |
An automated physical compiler for multi-port register files. (English) |
| Συγγραφείς: |
明天波, 刘必慰, 胡春媚, 吴振宇, 宋睿强, 宋芳芳 |
| Πηγή: |
Computer Engineering & Science / Jisuanji Gongcheng yu Kexue; Jun2025, Vol. 47 Issue 6, p976-987, 12p |
| Θεματικοί όροι: |
Heuristic algorithms, Computer architecture, Mathematical optimization, Designers, Speed, Compilers (Computer programs) |
| Abstract (English): |
In the design of application-specific microprocessors, designers need to iteratively experiment with different architectural parameters to achieve optimal application support. Multi-port register files, as core components, still rely on full-custom design or traditional compiler-assisted design. However, these methods often struggle to balance high performance requirements with design flexibility. making it difficult to achieve co-optimization with the architecture. This paper proposes a physical compiler for multi-port register files, which can automatically and quickly generate register file circuits and layouts with specified capacity and port count. Additionally, this paper proposes an optimized port structure to enhance the parallel access performance of the register file and a performance-driven heuristic algorithm to achieve optimized placement and routing results. Experimental results show that the proposed compiler can generate register files in approximately tens of hours to meet co-optimization requirements, achieving 31.5% speed improvement and 28.8% power reduction compared to full-custom designs, as well as 20. 7% higher speed and 33.9% lower power consumption relative to traditional compiler-assisted designs. [ABSTRACT FROM AUTHOR] |
| Abstract (Chinese): |
在专用微处理器设计中, 设计师需反复尝试不同的体系结构参数以实现最佳应用支持。多端口寄存器文件作为核心部件, 仍采用全定制或传统编译器辅助设计, 但是这 2 种方法往往难以兼顾高性能需求与设计灵活性, 因此难以与体系结构联合优化。提出一种用于多端口寄存器文件的物理编译器, 可以全自动地快速生成指定容量和端口数的寄存器文件电路与版图。此外, 还提出了优化的端口结构, 以提升寄存器文件的并行访问性能; 并提出了性能驱动的启发式算法, 以实现优化的布局布线结果。使用所提出的编译器生成寄存器文件的时间约为数十小时, 满足联合优化需求。与全定制设计相比, 所提编译器速度提升了 31. 5 %, 功耗降低了 28. 8 %; 与传统编译器辅助设计相比, 所提编译器速度提升了 20. 7 %, 功耗降低了 33. 9 %。 [ABSTRACT FROM AUTHOR] |
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| Βάση Δεδομένων: |
Complementary Index |