Academic Journal
Pseudo-Normalization via Integer Fast Inverse Square Root and Its Application to Fast Computation without Division.
| Title: | Pseudo-Normalization via Integer Fast Inverse Square Root and Its Application to Fast Computation without Division. |
|---|---|
| Authors: | Kusaka, Takashi, Tanaka, Takayuki |
| Source: | Electronics (2079-9292); Aug2024, Vol. 13 Issue 15, p2955, 15p |
| Subject Terms: | Real numbers, Rendering (Computer graphics), Square root, Floating-point arithmetic, Arithmetic |
| Abstract: | Vector normalization is an important process in several algorithms. It is used in classical physical calculations, mathematical techniques, and machine learning, which has witnessed significant advancements in recent years. Normalization and regularization ensure the stability of solutions and play an important role in algorithm convergence. Normalization typically refers to the division of elements by their norm. Division should not be used in algorithmic implementations because its computational cost is considerably higher than that of multiply–add operations. Based on this, there is a well-known method referred to as the fast inverse square root (FISR) algorithm in floating-point calculations (IEEE754). In deeper-level embedded systems that require fast responses or power efficiency, integer instead of real number arithmetic (floating-point number arithmetic) should be used to increase speed. Conversely, in deeper-level embedded systems that require fast responses or power efficiency, integer arithmetic should be used instead of real number arithmetic (floating-point number arithmetic) to increase speed. Therefore, embedded engineers encounter problems in instances in which they use integer arithmetic for implementation, but real number arithmetic is required to compute vectors and other higher-dimensional algebra. There is no conventional normalization algorithm similar to the FISR algorithm for integer arithmetic; however, the proposed pseudo-normalization achieves vector normalization within a restricted domain using only multiply–add operations and bit shifts. This allows for fast and robust operations, even for low-performance MCUs that do not have power-efficient FPUs. As an example, this study demonstrates the computation of the arctangent (Arctan2 function; atan2(y, x)) with high precision using only integer multiply–add operations. In this study, we proposed a method of vector normalization using only integer arithmetic for embedded systems and confirmed its effectiveness by simulation using Verilog. The research results can contribute to various fields such as signal processing of IMU sensor data, faster artificial intelligence training, and efficient rendering of computer graphics. [ABSTRACT FROM AUTHOR] |
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| Database: | Complementary Index |
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| Items | – Name: Title Label: Title Group: Ti Data: Pseudo-Normalization via Integer Fast Inverse Square Root and Its Application to Fast Computation without Division. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Kusaka%2C+Takashi%22">Kusaka, Takashi</searchLink><br /><searchLink fieldCode="AR" term="%22Tanaka%2C+Takayuki%22">Tanaka, Takayuki</searchLink> – Name: TitleSource Label: Source Group: Src Data: Electronics (2079-9292); Aug2024, Vol. 13 Issue 15, p2955, 15p – Name: Subject Label: Subject Terms Group: Su Data: <searchLink fieldCode="DE" term="%22Real+numbers%22">Real numbers</searchLink><br /><searchLink fieldCode="DE" term="%22Rendering+%28Computer+graphics%29%22">Rendering (Computer graphics)</searchLink><br /><searchLink fieldCode="DE" term="%22Square+root%22">Square root</searchLink><br /><searchLink fieldCode="DE" term="%22Floating-point+arithmetic%22">Floating-point arithmetic</searchLink><br /><searchLink fieldCode="DE" term="%22Arithmetic%22">Arithmetic</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Vector normalization is an important process in several algorithms. It is used in classical physical calculations, mathematical techniques, and machine learning, which has witnessed significant advancements in recent years. Normalization and regularization ensure the stability of solutions and play an important role in algorithm convergence. Normalization typically refers to the division of elements by their norm. Division should not be used in algorithmic implementations because its computational cost is considerably higher than that of multiply–add operations. Based on this, there is a well-known method referred to as the fast inverse square root (FISR) algorithm in floating-point calculations (IEEE754). In deeper-level embedded systems that require fast responses or power efficiency, integer instead of real number arithmetic (floating-point number arithmetic) should be used to increase speed. Conversely, in deeper-level embedded systems that require fast responses or power efficiency, integer arithmetic should be used instead of real number arithmetic (floating-point number arithmetic) to increase speed. Therefore, embedded engineers encounter problems in instances in which they use integer arithmetic for implementation, but real number arithmetic is required to compute vectors and other higher-dimensional algebra. There is no conventional normalization algorithm similar to the FISR algorithm for integer arithmetic; however, the proposed pseudo-normalization achieves vector normalization within a restricted domain using only multiply–add operations and bit shifts. This allows for fast and robust operations, even for low-performance MCUs that do not have power-efficient FPUs. As an example, this study demonstrates the computation of the arctangent (Arctan2 function; atan2(y, x)) with high precision using only integer multiply–add operations. In this study, we proposed a method of vector normalization using only integer arithmetic for embedded systems and confirmed its effectiveness by simulation using Verilog. The research results can contribute to various fields such as signal processing of IMU sensor data, faster artificial intelligence training, and efficient rendering of computer graphics. [ABSTRACT FROM AUTHOR] – Name: Abstract Label: Group: Ab Data: <i>Copyright of Electronics (2079-9292) is the property of MDPI and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.3390/electronics13152955 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 15 StartPage: 2955 Subjects: – SubjectFull: Real numbers Type: general – SubjectFull: Rendering (Computer graphics) Type: general – SubjectFull: Square root Type: general – SubjectFull: Floating-point arithmetic Type: general – SubjectFull: Arithmetic Type: general Titles: – TitleFull: Pseudo-Normalization via Integer Fast Inverse Square Root and Its Application to Fast Computation without Division. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Kusaka, Takashi – PersonEntity: Name: NameFull: Tanaka, Takayuki IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2024 Type: published Y: 2024 Identifiers: – Type: issn-print Value: 20799292 Numbering: – Type: volume Value: 13 – Type: issue Value: 15 Titles: – TitleFull: Electronics (2079-9292) Type: main |
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