Academic Journal
LLVM-C2RTL: C/C++ Based System Level RTL Design Framework Using LLVM Compiler Infrastructure.
| Τίτλος: | LLVM-C2RTL: C/C++ Based System Level RTL Design Framework Using LLVM Compiler Infrastructure. |
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| Συγγραφείς: | TAMON SADASUE, TSUYOSHI ISSHIKI |
| Πηγή: | IPSJ Transactions on System LSI Design Methodology; Feb2023, Vol. 16 Issue 1, p12-26, 15p |
| Θεματικοί όροι: | Computer hardware description languages, Digital electronics, High level synthesis (Electronic design), Hardware design & construction, Systems design, Compilers (Computer programs) |
| Περίληψη: | As the scale of digital circuit design increases, design and verification using conventional hardware description languages (HDLs), such as verilog-HDL and VHDL, limit efficiency. Consequently, high level synthesis (HLS), as well as domain specific languages (DSLs), which alternates conventional HDLs, are beginning to garner attention. We proposed a design framework that uses the C language as a register transfer level descriptive language. In this study, we introduced a LLVM compiler infrastructure to extend our previous work, support the C/C++ standard as the input code, and aggressively optimize the circuit design. In addition to supporting a single module generation, we extended our framework to support the hierarchical module description for efficient system design. We demonstrated the conversion of the input of C/C++ code into the verilog code, optimize its logic, and construct pipelined logic to achieve the original behavior in multiple clock cycles. Our framework offers a significantly efficient system-level hardware design and a powerful debugging environment with software development platforms and tool-sets. The generated hardware logic performs as well as or better than hand-written logic using conventional HDLs. [ABSTRACT FROM AUTHOR] |
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| Βάση Δεδομένων: | Complementary Index |
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