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Memory Module: High-Speed Low Latency Data Storing Modules.

Bibliographic Details
Title: Memory Module: High-Speed Low Latency Data Storing Modules.
Authors: Klein, Doris, Dech, Stefan, Raddwine, Bradley, Uken, Ernst
Source: Journal of VLSI Circuits & Systems (JVCS); 2023, Vol. 5 Issue 1, p35-41, 7p
Subject Terms: Industrial electronics, Digital electronics, Stray currents, Electronic data processing, Static random access memory, Metal oxide semiconductor field-effect transistors, Cache memory
Abstract: The electronics devices are facing a foremost drawback of standby leakage, which severely impacting the electronics industry from the past few decades. As well as the need for cache memory is proportionately increasing with the data processing frequency of the processors. SRAM is used for cache reminiscence layout. Many lowenergy techniques are considered to minimize the current leakage. Full MOSFET 6T SRAM mobile is the main application used for designing digital circuits. This task implements 6T MOSFET SRAM cell. The usage of FinFET spectra models, the layout, and circuit level software implementations are carried out using FinFET 18nm nodes. The power intake, mainly off-state leakage, present-day, is every other major problem being confronted inside the present-day technology of electronic enterprise because the chip densities increase with a wider variety of transistors. Energy consumption is the fundamental disadvantage in the SRAM model evaluation. Considering the salient features of the FinFET, 6T SRAM cell is designed at 18nm FinFET spectre models, and it is compared in contrast to MOSFET standard cell in support to the simulation results. [ABSTRACT FROM AUTHOR]
Copyright of Journal of VLSI Circuits & Systems (JVCS) is the property of Siree Publications and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Complementary Index
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DbLabel: Complementary Index
An: 160124449
RelevancyScore: 926
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 926.038452148438
IllustrationInfo
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  Data: Memory Module: High-Speed Low Latency Data Storing Modules.
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  Data: <searchLink fieldCode="AR" term="%22Klein%2C+Doris%22">Klein, Doris</searchLink><br /><searchLink fieldCode="AR" term="%22Dech%2C+Stefan%22">Dech, Stefan</searchLink><br /><searchLink fieldCode="AR" term="%22Raddwine%2C+Bradley%22">Raddwine, Bradley</searchLink><br /><searchLink fieldCode="AR" term="%22Uken%2C+Ernst%22">Uken, Ernst</searchLink>
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  Data: Journal of VLSI Circuits & Systems (JVCS); 2023, Vol. 5 Issue 1, p35-41, 7p
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  Data: <searchLink fieldCode="DE" term="%22Industrial+electronics%22">Industrial electronics</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+electronics%22">Digital electronics</searchLink><br /><searchLink fieldCode="DE" term="%22Stray+currents%22">Stray currents</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+data+processing%22">Electronic data processing</searchLink><br /><searchLink fieldCode="DE" term="%22Static+random+access+memory%22">Static random access memory</searchLink><br /><searchLink fieldCode="DE" term="%22Metal+oxide+semiconductor+field-effect+transistors%22">Metal oxide semiconductor field-effect transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Cache+memory%22">Cache memory</searchLink>
– Name: Abstract
  Label: Abstract
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  Data: The electronics devices are facing a foremost drawback of standby leakage, which severely impacting the electronics industry from the past few decades. As well as the need for cache memory is proportionately increasing with the data processing frequency of the processors. SRAM is used for cache reminiscence layout. Many lowenergy techniques are considered to minimize the current leakage. Full MOSFET 6T SRAM mobile is the main application used for designing digital circuits. This task implements 6T MOSFET SRAM cell. The usage of FinFET spectra models, the layout, and circuit level software implementations are carried out using FinFET 18nm nodes. The power intake, mainly off-state leakage, present-day, is every other major problem being confronted inside the present-day technology of electronic enterprise because the chip densities increase with a wider variety of transistors. Energy consumption is the fundamental disadvantage in the SRAM model evaluation. Considering the salient features of the FinFET, 6T SRAM cell is designed at 18nm FinFET spectre models, and it is compared in contrast to MOSFET standard cell in support to the simulation results. [ABSTRACT FROM AUTHOR]
– Name: Abstract
  Label:
  Group: Ab
  Data: <i>Copyright of Journal of VLSI Circuits & Systems (JVCS) is the property of Siree Publications and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edb&AN=160124449
RecordInfo BibRecord:
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    Identifiers:
      – Type: doi
        Value: 10.31838/jvcs/05.01.05
    Languages:
      – Code: eng
        Text: English
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        PageCount: 7
        StartPage: 35
    Subjects:
      – SubjectFull: Industrial electronics
        Type: general
      – SubjectFull: Digital electronics
        Type: general
      – SubjectFull: Stray currents
        Type: general
      – SubjectFull: Electronic data processing
        Type: general
      – SubjectFull: Static random access memory
        Type: general
      – SubjectFull: Metal oxide semiconductor field-effect transistors
        Type: general
      – SubjectFull: Cache memory
        Type: general
    Titles:
      – TitleFull: Memory Module: High-Speed Low Latency Data Storing Modules.
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            NameFull: Klein, Doris
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            NameFull: Dech, Stefan
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            NameFull: Raddwine, Bradley
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            NameFull: Uken, Ernst
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            – D: 01
              M: 01
              Text: 2023
              Type: published
              Y: 2023
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