APA (7th ed.) Citation

Klein, D., Dech, S., Raddwine, B., & Uken, E. (2023). Memory Module: High-Speed Low Latency Data Storing Modules. Journal of VLSI Circuits & Systems (JVCS), 5(1), 35. https://doi.org/10.31838/jvcs/05.01.05

Chicago Style (17th ed.) Citation

Klein, Doris, Stefan Dech, Bradley Raddwine, and Ernst Uken. "Memory Module: High-Speed Low Latency Data Storing Modules." Journal of VLSI Circuits & Systems (JVCS) 5, no. 1 (2023): 35. https://doi.org/10.31838/jvcs/05.01.05.

MLA (9th ed.) Citation

Klein, Doris, et al. "Memory Module: High-Speed Low Latency Data Storing Modules." Journal of VLSI Circuits & Systems (JVCS), vol. 5, no. 1, 2023, p. 35, https://doi.org/10.31838/jvcs/05.01.05.