Academic Journal

Efficient resource sharing algorithm for physical register file in simultaneous multi-threading processors.

Λεπτομέρειες βιβλιογραφικής εγγραφής
Τίτλος: Efficient resource sharing algorithm for physical register file in simultaneous multi-threading processors.
Συγγραφείς: Zhang, Yilin1 yilin.zhang@amd.com, Lin, Wei-Ming2 weiming.lin@utsa.edu
Πηγή: Microprocessors & Microsystems. Sep2016 Part B, Vol. 45, p270-282. 13p.
Θεματικοί όροι: *Simultaneous multithreading processors, *Threads (Computer programs), *Registers (Computers), *Algorithms, *Computer software execution
Περίληψη: Simultaneous Multi-Threading (SMT) processors increase performance by allowing concurrent execution of multiple independent threads with sharing of key datapath components and better utilization of the resources. An SMT processor usually maintains a shared register file to accommodate multiple threads for register renaming. By supporting inter-thread sharing of the physical registers, an SMT system processor can reduce the number of registers that would have been required in multiple superscalar processors while achieving a comparable throughput. However, congested shared resources due to slower threads can easily lead to inefficient usage of the resources and thus an undesirable performance outcome. In this paper, we propose an allocation algorithm at the architectural level for a better utilization of the shared register file. We show that, by limiting the number of the physical register entries each thread is allowed to occupy at any given time, the overall system throughput is enhanced by a substantial margin. An improvement in IPC of up to 44.6% and 32.7% is observed when the proposed technique is applied to a 4-threaded and a 6-threaded SMT system, respectively. Furthermore, a 4-threaded system with a physical register file of 160 entries can deliver a performance comparable to that of a default system with 256 entries, reflecting a resource saving of 37.5%. [ABSTRACT FROM AUTHOR]
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