Maximizing the Potential of Custom RISC-V Vector Extensions for Speeding up SHA-3 Hash Functions

Authors: Li, Huimin, Mentens, Nele, Picek, Stjepan

Source: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023. :1-6 Apr, 2023

Relation: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)

A scalable SIMD RISC-V based processor with customized vector extensions for CRYSTALS-kyber

Authors: Li, Huimin, Mentens, Nele, Picek, Stjepan

Source: Proceedings of the 59th ACM/IEEE Design Automation Conference. :733-738

Availability: http://dl.acm.org/doi/10.1145/3489517.3530552

CodeAPeel: An Integrated and Layered Learning Technology For Computer Architecture Courses

Authors: Oruç, Ahmet Yavuz, Author, Atmaca, Abdullah, Author, Sengun, Yusuf Nevzat, Author, Yenimol, Ali Semi, Author

Contributors: Oruç, Ahmet Yavuz, Author, Atmaca, Abdullah, Author, Sengun, Yusuf Nevzat, Author, Yenimol, Ali Semi, Author

Source: Computing Research Repository (CoRR). abs/2104.09502

Subject Terms: Assembly-language, computer architecture, frame buffer, graphics, learning technology, processor simulation, SISD processor, SIMD processor, screen programming, vector processing.

File Description: print

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-544383
https://doi.org/10.48550/arXiv.2104.09502

Implementation of Robust Compression Technique Using LZ77 Algorithm on Tensilica's Xtensa Processor

Authors: Vasanthi, D. R., Anusha, R., Vinay, B. K.

Source: 2016 International Conference on Information Technology (ICIT) ICIT Information Technology (ICIT), 2016 International Conference on. :148-153 Dec, 2016

Relation: 2016 International Conference on Information Technology (ICIT)

Design of a Coarse-Grained Processing Element for Matrix Multiplication on FPGA

Authors: Okuyama, Yuichi, Takano, Shigeyuki, Shirai, Tokimasa

Source: 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs Embedded Multicore/Manycore SoCs (MCSoc), 2014 IEEE 8th International Symposium on. :237-241 Sep, 2014

Relation: 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC)

An Embedded Vision Engine (EVE) for automotive vision processing

Authors: Mandal, Dipan Kumar, Sankaran, Jagadeesh, Gupta, Akshay, Castille, Kyle, Gondkar, Shraddha, Kamath, Sanmati, Sundar, Pooja, Phipps, Alan

Source: 2014 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2014 IEEE International Symposium on. :49-52 Jun, 2014

Relation: 2014 IEEE International Symposium on Circuits and Systems (ISCAS)

Toward real-time, low-power, highly parallel decoding of the golden code in Mobile WiMAX base stations

Authors: Amani, Elie, Djouani, Karim, Kurien, Anish

Source: 2014 IEEE International Conference on Industrial Technology (ICIT) Industrial Technology (ICIT), 2014 IEEE International Conference on. :594-599 Feb, 2014

Relation: 2014 IEEE International Conference on Industrial Technology (ICIT)

A monitoring system for laser beam welding based on an algorithm for spatter detection

Authors: Nicolosi, L., Tetzlaff, R., Blug, A., Hofler, H., Carl, D., Abt, F., Heider, A.

Source: 2011 20th European Conference on Circuit Theory and Design (ECCTD) Circuit Theory and Design (ECCTD), 2011 20th European Conference on. :25-28 Aug, 2011

Relation: 2011 European Conference on Circuit Theory and Design (ECCTD)

A kernel interleaved scheduling method for streaming applications on soft-core vector processors

Authors: Zheng, Chengwei, McAllister, John, Wu, Yun

Source: 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation Embedded Computer Systems (SAMOS), 2011 International Conference on. :278-285 Jul, 2011

Relation: 2011 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI)

Software Programmable Data Allocation in Multi-bank Memory of SIMD Processors

Authors: Wang, Jian, Sohl, Joar, Kraigher, Olof, Liu, Dake

Source: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on. :28-33 Sep, 2010

Relation: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD)

A fast parallel reed-solomon decoder on a reconfigurable architecture

Authors: Koohi, Arezou, Bagherzadeh, Nader, Pan, Chengzi

Source: Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis. :59-64

Availability: http://dl.acm.org/doi/10.1145/944645.944660

Access-Pattern-Aware On-Chip Memory Allocation for SIMD Processors

Authors: Chang, H., Sung, W.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 28(1):158-163 Jan, 2009

Implementation of Robust Solid State Drive Controller Using LZ77 Compression and SHA-1 Encryption Technique

Authors: D’costa, Amanda Kelly^Aff18, Raksha, K. P.^Aff18, Vasanthi, D. R.^Aff18

Contributors: Kacprzyk, Janusz, Series Editor^Aff1, Pal, Nikhil R., Advisory Editor^Aff2, Bello Perez, Rafael, Advisory Editor^Aff3, Corchado, Emilio S., Advisory Editor^Aff4, Hagras, Hani, Advisory Editor^Aff5, Kóczy, László T., Advisory Editor^Aff6, Kreinovich, Vladik, Advisory Editor^Aff7, Lin, Chin-Teng, Advisory Editor^Aff8, Lu, Jie, Advisory Editor^Aff9, Melin, Patricia, Advisory Editor^{Aff10, Aff16}, Nedjah, Nadia, Advisory Editor^Aff11, Nguyen, Ngoc Thanh, Advisory Editor^Aff12, Wang, Jun, Advisory Editor^Aff13, Abraham, Ajith, editor^Aff14, Cherukuri, Aswani Kumar, editor^Aff15, Gandhi, Niketa, editor^Aff17

Source: Intelligent Systems Design and Applications : 18th International Conference on Intelligent Systems Design and Applications (ISDA 2018) held in Vellore, India, December 6-8, 2018, Volume 1. 940:833-843

Cellular Neural Network (CNN) based control algorithms for omnidirectional laser welding processes: Experimental results

Authors: Nicolosi, Leonardo, Tetzlaff, Ronald, Abt, Felix, Blug, Andreas, Hofler, Heinrich

Source: 2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010) Cellular Nanoscale Networks and Their Applications (CNNA), 2010 12th International Workshop on. :1-6 Feb, 2010

Relation: 2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010)

SIMD processor based implementation of recursive filtering equations

Authors: Ahn, Jaewoo, Chang, Hoseok, Cho, Junho, Sung, Wonyong

Source: 2009 IEEE Workshop on Signal Processing Systems Signal Processing Systems, 2009. SiPS 2009. IEEE Workshop on. :087-092 Oct, 2009

Relation: 2009 IEEE Workshop on Signal Processing Systems (SiPS)

Omnidirectional algorithm for the full penetration hole extraction in laser welding processes

Authors: Nicolosi, Leonardo, Tetzlaff, Ronald, Abt, Felix, Blug, Andreas, Hofler, Heinrich, Carl, Daniel

Source: 2009 European Conference on Circuit Theory and Design Circuit Theory and Design, 2009. ECCTD 2009. European Conference on. :177-180 Aug, 2009

Relation: 2009 European Conference on Circuit Theory and Design (ECCTD 2009)

The Jubi approach: a tool set for hardware acceleration in sensor network applications field

Authors: Brousse, O., Sassatelli, G., Grize, F.

Source: 2009 Ph.D. Research in Microelectronics and Electronics Research in Microelectronics and Electronics, 2009. PRIME 2009 Ph.D.. :40-43 Jul, 2009

Relation: 2009 Ph.D. Research in Microelectronics and Electronics (PRIME)

A new method for fast skeletonization of binary images on cellular processor arrays

Authors: Wang, Bin, Mroszczyk, Przemyslaw, Dudek, Piotr

Source: 2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA) Cellular Nanoscale Networks and their Applications (CNNA), 2014 14th International Workshop on. :1-2 Jul, 2014

Relation: 2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)

CNFET-Based High Throughput SIMD Architecture

Authors: Jiang, L., Li, T., Jing, N., Kim, N.S., Guo, M., Liang, X.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 37(7):1331-1344 Jul, 2018

Implementation of the AVS video decoder on a heterogeneous dual-core SIMD processor

Authors: Koziri, M., Zacharis, D., Katsavounidis, I., Bellas, N.

Source: IEEE Transactions on Consumer Electronics IEEE Trans. Consumer Electron. Consumer Electronics, IEEE Transactions on. 57(2):673-681 May, 2011