Hardware Synthesis of Functional Programs with Esterel Constructs

Συγγραφείς: Sylvestre, Loic

Πηγή: 2026 Forum on Specification & Design Languages (FDL) Specification & Design Languages (FDL), 2026 Forum on. :1-7 Sep, 2026

Relation: 2026 Forum on Specification & Design Languages (FDL)

Exploring the Impact of 2D Convolutional Layer Hyperparameters in FPGA Implementation

Συγγραφείς: Pozzer, Fernando Pedrazzi, de Oliveira, Tobias Viero, de Farias, Renan Carlos Gomes, Rutzig, Mateus Beck

Πηγή: 2026 39th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) Integrated Circuits and Systems Design (SBCCI), 2026 39th SBC/SBMicro/IEEE Symposium on. :1-5 Aug, 2026

Relation: 2026 39th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)

Implementation of Range-Doppler Frequency Spectrum Map in FPGA for FMCW Radar Applications

Συγγραφείς: Kumari, Tanu, V, Satish Kumar, Ajith, Abhinav P, Mathur, Priyanka, Mathur, Parul

Πηγή: 2026 International Conference on Emerging Techniques in Computational Intelligence (ICETCI) Emerging Techniques in Computational Intelligence (ICETCI), 2026 International Conference on. :1-6 Aug, 2026

Relation: 2026 International Conference on Emerging Techniques in Computational Intelligence (ICETCI)

ContractHIL-HLS: Contract-Aligned Multi-Agent Workflow with Hardware-in-the-Loop Feedback for HLS Design

Συγγραφείς: Zhang, Jingbo, Sun, Haoxiang, Wang, Wenbo, Zhang, Wenbo

Πηγή: 2026 IEEE International Test Conference in Asia (ITC-Asia) Test Conference in Asia (ITC-Asia), 2026 IEEE International. :1-6 Aug, 2026

Relation: 2026 IEEE International Test Conference in Asia (ITC-Asia)

An Efficient HLS-Based Hardware Accelerator with Resource Optimization for Transformer Models

Συγγραφείς: Tran, Xuan Thao, Tran, Thi Diem

Πηγή: 2026 International Conference on Multimedia Analysis and Pattern Recognition (MAPR) Multimedia Analysis and Pattern Recognition (MAPR), 2026 International Conference on. :784-789 Aug, 2026

Relation: 2026 International Conference on Multimedia Analysis and Pattern Recognition (MAPR)

Lifelong Learning in Digital Design: Expert Course in Digital Microelectronic Design

Συγγραφείς: Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Garcia, Pablo Perez, Barros, Angel Barriga, Berni, Jorge Fernandez, Lopez, Rosario Arjona, Toledo, Jose Maria Quintana, Gutierrez, Jose Miguel Mora, Avedillo de Juan, Ma Jose

Πηγή: 2026 XVII Congreso Internacional Tecnología Aprendizaje y Enseñanza de la Electrónica (TAEE) Tecnología Aprendizaje y Enseñanza de la Electrónica (TAEE), 2026 XVII Congreso Internacional. :1-6 Jul, 2026

Relation: 2026 XVII Congreso Internacional Tecnología Aprendizaje y Enseñanza de la Electrónica (TAEE)

Diffusion Model Based Multi-Objective Evolutionary Algorithm for High-Level Synthesis Design Space Exploration

Συγγραφείς: Lin, Runxin, Wang, Shanshan, Xiao, Chenglong

Πηγή: 2026 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2026 IEEE International Symposium on. :1442-1446 May, 2026

Relation: 2026 IEEE International Symposium on Circuits and Systems (ISCAS)

A Framework for Evaluating GenAI Adoption and Use in Software Engineering

Συγγραφείς: Yu, Liang, Author, Alégroth, Emil, Author, Chatzipetrou, Panagiota, Assistant Professor, 1984-, Author, Gorschek, Tony, Author

Συνεισφορές: Yu, Liang, Author, Alégroth, Emil, Author, Chatzipetrou, Panagiota, Assistant Professor, 1984-, Author, Gorschek, Tony, Author

Πηγή: IEEE Transactions on Software Engineering. 52(8):2233-2249

Θεματικοί όροι: Feeds, Feedback, Circuits, Filtering, Filters, Circuits and systems, Contacts, High level synthesis, Communication systems, Feedback loop, Generative artificial intelligence, GenAI, AI4SE, SE4AI, empirical study, software engineering

Περιγραφή αρχείου: print

Σύνδεσμος πρόσβασης: https://urn.kb.se/resolve?urn=urn:nbn:se:oru:diva-130879
https://doi.org/10.1109/TSE.2026.3688745

Accelerating many-core, heterogeneous, and distributed architectures with hardware runtimes and programming models

Συγγραφείς: De Haro Ruiz, Juan Miguel

Συνεισφορές: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Álvarez Martínez, Carlos, Jiménez González, Daniel

Πηγή: TDX (Tesis Doctorals en Xarxa)

Θεματικοί όροι: High Performance Computing (HPC), Field-Programmable Gate Array (PFGA), task scheduling, task-based programming models, computer architecture, CPU, MPI, High-Level Synthesis (HLS), energy efficiency, programmability, many-core architectures, FPGA clusters, hardware runtimes, hardware acceleration, ASIC, Implicit Message Passing (IMP), Àrees temàtiques de la UPC::Informàtica, 004 - Informàtica

Περιγραφή αρχείου: application/pdf

Σύνδεσμος πρόσβασης: http://hdl.handle.net/10803/695347
https://dx.doi.org/10.5821/dissertation-2117-442722

NeuSym-HLS: Efficient Hardware Acceleration of Deep Neural Networks With Symbolic Distillation and High-Level Synthesis

Συγγραφείς: Pan, C., Panigrahy, S., Elmalaki, S., Shoukry, Y., Huang, S.

Πηγή: IEEE Embedded Systems Letters IEEE Embedded Syst. Lett. Embedded Systems Letters, IEEE. 18(5):452-455 Oct, 2026

NeuroSchedule2.0: A Novel GNN-Based Scheduling Method With RL-Based Preprocessing Optimization for High-Level Synthesis

Συγγραφείς: Zeng, J., Kou, M., Yao, H., Yin, X., Wang, H., Sun, F.

Πηγή: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 45(10):4734-4747 Oct, 2026

NormMax: A Robust L2-Normalization Activation Function With Precision-Scalable Hardware Architectures for Noisy-Label Learning

Συγγραφείς: Liu, C., Liu, J., Wang, K., Zhang, Y., Wu, D., Li, W., Bao, W., Chen, H.

Πηγή: IEEE Transactions on Circuits and Systems for Video Technology IEEE Trans. Circuits Syst. Video Technol. Circuits and Systems for Video Technology, IEEE Transactions on. 36(9):14198-14212 Sep, 2026

SafeHDC: Concurrent Uncertainty and Fault Detection in Hyperdimensional Computing

Συγγραφείς: Roodsari, M.S., Meyers, V., Tahoori, M.

Πηγή: IEEE Transactions on Device and Materials Reliability IEEE Trans. Device Mater. Relib. Device and Materials Reliability, IEEE Transactions on. 26(3):771-779 Sep, 2026

XPNet: Cross-FPGA Power Prediction From High-Level Language Code

Συγγραφείς: Wei, Z., Seigler, A., Lowe, S., Shriver, E., Arora, A., Kurian John, L.

Πηγή: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 45(8):3683-3696 Aug, 2026

Accurate, Efficient, and Scalable Power Modeling for FPGA HLS

Συγγραφείς: Yan, S., Huang, K., Zhao, K., Lin, Z.

Πηγή: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 45(8):3697-3710 Aug, 2026

An HLS-Based Framework for Non-Ideality Aware Modeling of SRAM-Based Analog In-Memory Computing Accelerators

Συγγραφείς: Aslam, T.B., Shukla, S., Choudhary, U., Iqbal, B., Grover, A.

Πηγή: IEEE Journal on Emerging and Selected Topics in Circuits and Systems IEEE J. Emerg. Sel. Topics Circuits Syst. Emerging and Selected Topics in Circuits and Systems, IEEE Journal on. 16(2):403-411 Jun, 2026

Efficient FPGA Deployment of Mixed-Precision Quantized CNNs

Συγγραφείς: Nguyen, Trong Nhan, Ngoc Truong, Son

Πηγή: 2026 8th International Conference on Green Technology and Sustainable Development (GTSD) Green Technology and Sustainable Development (GTSD), 2026 8th International Conference on. :918-922 Jul, 2026

Relation: 2026 8th International Conference on Green Technology and Sustainable Development (GTSD)

FPGA based Acceleration of Multi-Task Vehicle Perception System

Συγγραφείς: P, Anton Rejoe, Vishnu, V, T, Vijayaraghavan, B, Yamuna

Πηγή: 2026 IEEE Region 10 Symposium (TENSYMP) Region 10 Symposium (TENSYMP), 2026 IEEE. :1-5 Jun, 2026

Relation: 2026 IEEE Region 10 Symposium (TENSYMP)

Graph.hls: A Compiler Framework for Composable Graph Accelerator Design

Συγγραφείς: Wu, Feiyang, Yang, Xuxiao, Bian, Zhuohang, Wang, Jing, Xu, Ruifan, Sun, Guangyu, Liang, Yun, Zhuo, Youwei

Πηγή: 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA) ISCA Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on. :748-763 Jun, 2026

Relation: 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA)

CODO: An Automated Compiler for Comprehensive Dataflow Optimization

Συγγραφείς: Zhang, Weichuang, Wang, Yiquan, Zhang, Xinzhou, Zhang, Chi, Feng, Yu, Hou, Xiaofeng, Li, Chao, Zhao, Jieru, Guo, Minyi

Πηγή: 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA) ISCA Computer Architecture (ISCA), 2026 ACM/IEEE 53rd Annual International Symposium on. :1-17 Jun, 2026

Relation: 2026 ACM/IEEE 53rd Annual International Symposium on Computer Architecture (ISCA)