Hybrid Signed Mac-Driven Stochastic Squeezenet for Hardware-Constrained Neural Network Inference

Authors: Talakal, Mahanta, Yeshlur, Mallikarjun, R, Omkar N, G, Sahithi, B, Rajeshwari

Source: 2026 30th International Symposium on VLSI Design and Test (VDAT) VLSI Design and Test (VDAT), 2026 30th International Symposium on. :412-417 Aug, 2026

Relation: 2026 30th International Symposium on VLSI Design and Test (VDAT)

A Hardware-Efficient Dual-Mode Polynomial Sampling Architecture with Hash Integration for Post-Quantum Cryptography

Authors: Sravya, Alahari Sri Lakshmi, Venkatapavani, Basu, Islam, MD Najrul

Source: 2026 30th International Symposium on VLSI Design and Test (VDAT) VLSI Design and Test (VDAT), 2026 30th International Symposium on. :7-11 Aug, 2026

Relation: 2026 30th International Symposium on VLSI Design and Test (VDAT)

A Hardware-Efficient V LSI Architecture and FPGA Implementation of Atkinson Index Detector Based Cooperative Spectrum Sensor for Cognitive Radio Networks

Authors: Shrivastava, Urjal, Chaurasiya, Rohit, Guimaraes, D. A., Singh, Ajay

Source: 2026 30th International Symposium on VLSI Design and Test (VDAT) VLSI Design and Test (VDAT), 2026 30th International Symposium on. :12-17 Aug, 2026

Relation: 2026 30th International Symposium on VLSI Design and Test (VDAT)

Implementation of Range-Doppler Frequency Spectrum Map in FPGA for FMCW Radar Applications

Authors: Kumari, Tanu, V, Satish Kumar, Ajith, Abhinav P, Mathur, Priyanka, Mathur, Parul

Source: 2026 International Conference on Emerging Techniques in Computational Intelligence (ICETCI) Emerging Techniques in Computational Intelligence (ICETCI), 2026 International Conference on. :1-6 Aug, 2026

Relation: 2026 International Conference on Emerging Techniques in Computational Intelligence (ICETCI)

DCC-PUF: A Delay-Composition-and-Coupling Physical Unclonable Function Design for FPGA

Authors: Zhu, Hengyu, Shi, Guang, Gao, Quanlong, Zhang, Renyuan, Guo, Mingze

Source: 2026 IEEE International Test Conference in Asia (ITC-Asia) Test Conference in Asia (ITC-Asia), 2026 IEEE International. :1-6 Aug, 2026

Relation: 2026 IEEE International Test Conference in Asia (ITC-Asia)

Algebraic Non-CORDIC Systolic Arrays for Jacobi-Based Singular Value Decomposition

Authors: Kumar, Jonnala Sai Maneesh, Banerjee, Anjan, Vardhan, Maloth Vishnu, Prajwal, Richard, Prakash, M. Durga, Acharyya, Amit, Samanta, Sounak, Lakshmi, A. Prasanna

Source: 2026 IEEE 69th International Midwest Symposium on Circuits and Systems (MWSCAS) Circuits and Systems (MWSCAS), 2026 IEEE 69th International Midwest Symposium on. :551-555 Aug, 2026

Relation: 2026 IEEE 69th International Midwest Symposium on Circuits and Systems (MWSCAS)

Design and Implementation of an FPGA-Based Neopixel LED Driver Using Verilog HDL

Authors: Sreehari, S, Megalingam, Rajesh Kannan

Source: 2026 9th International Conference on Circuit, Power & Computing Technologies (ICCPCT) Circuit, Power & Computing Technologies (ICCPCT), 2026 9th International Conference on. :1747-1752 Aug, 2026

Relation: 2026 9th International Conference on Circuit, Power & Computing Technologies (ICCPCT)

Design and Implementation of Power-Efficient RISC-V Processor

Authors: Selvan, P., Karthikeyani, A., Prabhakaran, M., Siranjeevi, M., Kishore, E., Abisekar, P.

Source: 2026 10th International Conference on Inventive Systems and Control (ICISC) Inventive Systems and Control (ICISC), 2026 10th International Conference on. :158-164 Aug, 2026

Relation: 2026 10th International Conference on Inventive Systems and Control (ICISC)

An Efficient FPGA-Based Architecture for Real-Time ECG Signal Acquisition and FIR Filtering

Authors: G, Pavana., R, Shobha K

Source: 2026 10th International Conference on Inventive Systems and Control (ICISC) Inventive Systems and Control (ICISC), 2026 10th International Conference on. :636-642 Aug, 2026

Relation: 2026 10th International Conference on Inventive Systems and Control (ICISC)

FPGA Based Motion Controller with Parallel PWM Generation for a Four-DoF Robotic Arm

Authors: Abidin, Zainul, Chrisnadi, Yosef Moscati Kresna, Muttaqin, Adharul, Miyauchi, Ryoichi

Source: 2026 International Electronics Symposium (IES) Electronics Symposium (IES), 2026 International. :241-246 Aug, 2026

Relation: 2026 International Electronics Symposium (IES)

Accelerating many-core, heterogeneous, and distributed architectures with hardware runtimes and programming models

Authors: De Haro Ruiz, Juan Miguel

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Álvarez Martínez, Carlos, Jiménez González, Daniel

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: High Performance Computing (HPC), Field-Programmable Gate Array (PFGA), task scheduling, task-based programming models, computer architecture, CPU, MPI, High-Level Synthesis (HLS), energy efficiency, programmability, many-core architectures, FPGA clusters, hardware runtimes, hardware acceleration, ASIC, Implicit Message Passing (IMP), Àrees temàtiques de la UPC::Informàtica, 004 - Informàtica

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/695347
https://dx.doi.org/10.5821/dissertation-2117-442722

Hypnos: A Hardware--Software Co-Design Framework for Memory-Efficient Homomorphic Processing

Authors: Wang, H., Yang, Y., Pan, S., Lu, H., Li, X.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 45(10):4940-4953 Oct, 2026

SpikeEdge: A Residual Spiking Neural Network Architecture With Edge-Based Data Encoding for Efficient Hardware Design

Authors: Mishra, S.M., Kundu, S., Meitei, N.Y., Shekhawat, H.S., Trivedi, G.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3288-3298 Oct, 2026

A Fully Sparse Transformer Accelerator With Hybrid-Grained Pipeline for 3-D Object Detection

Authors: Zhang, Q., Xu, X., Alzaher, H.A.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3201-3211 Oct, 2026

High-Performance System-on-Chip Architectures for Multipoint Quasi-Distributed Fiber-Optic Sensors for Monitoring in Critical Systems

Authors: Mata-Carballeira, O., Flores-Bravo, J.A., Jimenez, J., Astarloa, A.

Source: IEEE Sensors Journal IEEE Sensors J. Sensors Journal, IEEE. 26(19):29658-29675 Oct, 2026

Highly Robust Obfuscated Arbiter PUF Based on the Lorenz Attractor System

Authors: Yao, L., Shi, D., Liu, L., Zhang, Y., Zhu, Y., Huang, Z., Liang, H., Lu, Y., Yan, A., Xu, Y.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3337-3350 Oct, 2026

A Real-Time FPGA-Accelerated Causal Spectro-Temporal Reconstruction Network for Speech Enhancement in Hearing Aids

Authors: Ni, X., Xu, D., Anwar, U., Arslan, T.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3189-3200 Oct, 2026

Architecture and Design of 1.6-GS/s Digital Frequency Up/Down Converter Based on Polyphase Filter Bank

Authors: Palani, R.K., Srivastava, A., Barola, R., Saha, K.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 34(10):3212-3220 Oct, 2026

AMARETTO, Accelerating Quantum Algorithm Development With FPGA Emulation

Authors: Conti, C., Volpe, D., Graziano, M., Turvani, G.

Source: IEEE Transactions on Computers IEEE Trans. Comput. Computers, IEEE Transactions on. 75(10):3544-3555 Oct, 2026

Multipath Sphere Decoding for FPGA-Accelerated Multistep Finite Control Set Model Predictive Control in SPMSM Drives

Authors: Yang, C., Hu, M., Hua, W., Wu, Z.

Source: IEEE Transactions on Power Electronics IEEE Trans. Power Electron. Power Electronics, IEEE Transactions on. 41(10):17221-17233 Oct, 2026